SPEC CPU(R)2017 Floating Point Rate Result Cisco Systems Cisco UCS B200 M5 (Intel Xeon Gold 5120, 2.20GHz) CPU2017 License: 9019 Test date: Oct-2017 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 503.bwaves_r 56 1346 417 * 56 1346 417 * 503.bwaves_r 56 1347 417 S 56 1345 418 S 503.bwaves_r 56 1346 417 S 56 1346 417 S 507.cactuBSSN_r 56 553 128 S 56 560 127 S 507.cactuBSSN_r 56 551 129 * 56 561 126 * 507.cactuBSSN_r 56 551 129 S 56 561 126 S 508.namd_r 56 521 102 S 56 518 103 S 508.namd_r 56 525 101 * 56 527 101 S 508.namd_r 56 530 100 S 56 519 102 * 510.parest_r 56 1579 92.8 S 56 1588 92.3 S 510.parest_r 56 1587 92.3 * 56 1587 92.3 * 510.parest_r 56 1596 91.8 S 56 1582 92.6 S 511.povray_r 56 778 168 * 56 681 192 S 511.povray_r 56 779 168 S 56 672 195 S 511.povray_r 56 777 168 S 56 672 195 * 519.lbm_r 56 619 95.4 S 56 581 102 * 519.lbm_r 56 619 95.3 * 56 581 102 S 519.lbm_r 56 620 95.1 S 56 583 101 S 521.wrf_r 56 743 169 S 56 738 170 S 521.wrf_r 56 745 168 * 56 733 171 * 521.wrf_r 56 747 168 S 56 731 172 S 526.blender_r 56 587 145 S 56 620 138 S 526.blender_r 56 587 145 S 56 620 138 S 526.blender_r 56 587 145 * 56 620 138 * 527.cam4_r 56 743 132 * 56 742 132 * 527.cam4_r 56 743 132 S 56 742 132 S 527.cam4_r 56 742 132 S 56 742 132 S 538.imagick_r 56 674 207 S 56 674 207 * 538.imagick_r 56 674 207 * 56 678 205 S 538.imagick_r 56 674 207 S 56 673 207 S 544.nab_r 56 517 182 S 56 508 186 * 544.nab_r 56 514 183 S 56 506 186 S 544.nab_r 56 514 183 * 56 509 185 S 549.fotonik3d_r 56 1766 124 S 56 1768 123 * 549.fotonik3d_r 56 1768 123 * 56 1768 123 S 549.fotonik3d_r 56 1768 123 S 56 1767 123 S 554.roms_r 56 1196 74.4 S 56 1169 76.1 S 554.roms_r 56 1197 74.4 * 56 1167 76.2 * 554.roms_r 56 1197 74.3 S 56 1164 76.4 S ================================================================================= 503.bwaves_r 56 1346 417 * 56 1346 417 * 507.cactuBSSN_r 56 551 129 * 56 561 126 * 508.namd_r 56 525 101 * 56 519 102 * 510.parest_r 56 1587 92.3 * 56 1587 92.3 * 511.povray_r 56 778 168 * 56 672 195 * 519.lbm_r 56 619 95.3 * 56 581 102 * 521.wrf_r 56 745 168 * 56 733 171 * 526.blender_r 56 587 145 * 56 620 138 * 527.cam4_r 56 743 132 * 56 742 132 * 538.imagick_r 56 674 207 * 56 674 207 * 544.nab_r 56 514 183 * 56 508 186 * 549.fotonik3d_r 56 1768 123 * 56 1768 123 * 554.roms_r 56 1197 74.4 * 56 1167 76.2 * SPECrate(R)2017_fp_base 141 SPECrate(R)2017_fp_peak 144 HARDWARE -------- CPU Name: Intel Xeon Gold 5120 Max MHz: 3200 Nominal: 2200 Enabled: 28 cores, 2 chips, 2 threads/core Orderable: 1,2 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 19.25 MB I+D on chip per chip Other: None Memory: 384 GB (24 x 16 GB 2Rx4 PC4-2666V-R, running at 2400) Storage: 1 x 600 GB SAS HDD, 10K RPM Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.0.128 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 3.2.1d released Jul-2017 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: None Power Management: -- Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled CPU performance set to Enterprise Power Performance Tuning set to OS SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-djj4 Thu Oct 26 01:03:27 2017 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 5120 CPU @ 2.20GHz 2 "physical id"s (chips) 56 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 14 siblings : 28 physical 0: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14 physical 1: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 56 On-line CPU(s) list: 0-55 Thread(s) per core: 2 Core(s) per socket: 14 Socket(s): 2 NUMA node(s): 4 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 5120 CPU @ 2.20GHz Stepping: 4 CPU MHz: 1377.715 CPU max MHz: 3200.0000 CPU min MHz: 1000.0000 BogoMIPS: 4399.99 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 19712K NUMA node0 CPU(s): 0-3,7-9,28-31,35-37 NUMA node1 CPU(s): 4-6,10-13,32-34,38-41 NUMA node2 CPU(s): 14-17,21-23,42-45,49-51 NUMA node3 CPU(s): 18-20,24-27,46-48,52-55 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 19712 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 1 2 3 7 8 9 28 29 30 31 35 36 37 node 0 size: 95159 MB node 0 free: 94799 MB node 1 cpus: 4 5 6 10 11 12 13 32 33 34 38 39 40 41 node 1 size: 96753 MB node 1 free: 96411 MB node 2 cpus: 14 15 16 17 21 22 23 42 43 44 45 49 50 51 node 2 size: 96753 MB node 2 free: 96407 MB node 3 cpus: 18 19 20 24 25 26 27 46 47 48 52 53 54 55 node 3 size: 96750 MB node 3 free: 96400 MB node distances: node 0 1 2 3 0: 10 11 21 21 1: 11 10 21 21 2: 21 21 10 11 3: 21 21 11 10 From /proc/meminfo MemTotal: 394666908 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-djj4 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Dec 31 19:34 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 559G 115G 445G 21% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. B200M5.3.2.1d.5.0727171353 07/27/2017 Memory: 24x 0xCE00 M393A2G40EB2-CTD 16 GB 2 rank 2666, configured at 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 519.lbm_r(base, peak) 538.imagick_r(base, peak) | 544.nab_r(base, peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 508.namd_r(base, peak) 510.parest_r(base, peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(base, peak) 526.blender_r(base, peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 507.cactuBSSN_r(base, peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak) | 554.roms_r(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(base, peak) 527.cam4_r(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using both C and C++: icpc icc Benchmarks using Fortran, C, and C++: icpc icc ifort Base Portability Flags ---------------------- 503.bwaves_r: -DSPEC_LP64 507.cactuBSSN_r: -DSPEC_LP64 508.namd_r: -DSPEC_LP64 510.parest_r: -DSPEC_LP64 511.povray_r: -DSPEC_LP64 519.lbm_r: -DSPEC_LP64 521.wrf_r: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 526.blender_r: -DSPEC_LP64 -DSPEC_LINUX -funsigned-char 527.cam4_r: -DSPEC_LP64 -DSPEC_CASE_FLAG 538.imagick_r: -DSPEC_LP64 544.nab_r: -DSPEC_LP64 549.fotonik3d_r: -DSPEC_LP64 554.roms_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX2 -mtune=skylake -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX2 -mtune=skylake -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 Fortran benchmarks: -xCORE-AVX2 -mtune=skylake -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: -xCORE-AVX2 -mtune=skylake -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Benchmarks using both C and C++: -xCORE-AVX2 -mtune=skylake -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 Benchmarks using Fortran, C, and C++: -xCORE-AVX2 -mtune=skylake -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Base Other Flags ---------------- C benchmarks: -m64 -std=c11 C++ benchmarks: -m64 Fortran benchmarks: -m64 Benchmarks using both Fortran and C: -m64 -std=c11 Benchmarks using both C and C++: -m64 -std=c11 Benchmarks using Fortran, C, and C++: -m64 -std=c11 Peak Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using both C and C++: icpc icc Benchmarks using Fortran, C, and C++: icpc icc ifort Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 519.lbm_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -mtune=skylake -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 538.imagick_r: -xCORE-AVX2 -mtune=skylake -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 544.nab_r: Same as 519.lbm_r C++ benchmarks: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -mtune=skylake -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 Fortran benchmarks: 503.bwaves_r: -xCORE-AVX2 -mtune=skylake -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte 549.fotonik3d_r: Same as 503.bwaves_r 554.roms_r: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -mtune=skylake -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Benchmarks using both Fortran and C: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -mtune=skylake -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Benchmarks using both C and C++: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -mtune=skylake -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 Benchmarks using Fortran, C, and C++: -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -mtune=skylake -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte Peak Other Flags ---------------- C benchmarks: -m64 -std=c11 C++ benchmarks: -m64 Fortran benchmarks: -m64 Benchmarks using both Fortran and C: -m64 -std=c11 Benchmarks using both C and C++: -m64 -std=c11 Benchmarks using Fortran, C, and C++: -m64 -std=c11 The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.0.2 on 2017-10-26 01:03:26-0400. Report generated on 2020-06-25 17:34:24 by CPU2017 text formatter v6255. Originally published on 2017-11-14.