SPEC(R) CPU2017 Integer Rate Result Lenovo Global Technology ThinkSystem SR550 (2.60 GHz, Intel Xeon Silver 4112) CPU2017 License: 9017 Test date: Oct-2017 Test sponsor: Lenovo Global Technology Hardware availability: Aug-2017 Tested by: Lenovo Global Technology Software availability: Sep-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 16 803 31.7 S 16 637 40.0 S 500.perlbench_r 16 789 32.3 * 16 639 39.9 S 500.perlbench_r 16 787 32.4 S 16 637 40.0 * 502.gcc_r 16 594 38.2 S 16 498 45.5 S 502.gcc_r 16 587 38.6 S 16 502 45.1 S 502.gcc_r 16 589 38.5 * 16 499 45.4 * 505.mcf_r 16 483 53.5 S 16 469 55.2 S 505.mcf_r 16 480 53.8 * 16 481 53.7 S 505.mcf_r 16 472 54.7 S 16 480 53.9 * 520.omnetpp_r 16 792 26.5 S 16 779 26.9 * 520.omnetpp_r 16 791 26.5 * 16 775 27.1 S 520.omnetpp_r 16 781 26.9 S 16 782 26.8 S 523.xalancbmk_r 16 357 47.3 S 16 303 55.8 * 523.xalancbmk_r 16 351 48.1 * 16 303 55.8 S 523.xalancbmk_r 16 348 48.5 S 16 303 55.7 S 525.x264_r 16 329 85.2 S 16 316 88.7 S 525.x264_r 16 326 85.9 * 16 317 88.4 * 525.x264_r 16 323 86.7 S 16 320 87.7 S 531.deepsjeng_r 16 493 37.2 S 16 488 37.5 S 531.deepsjeng_r 16 491 37.4 * 16 490 37.4 S 531.deepsjeng_r 16 490 37.4 S 16 489 37.5 * 541.leela_r 16 762 34.8 S 16 754 35.2 S 541.leela_r 16 760 34.9 S 16 757 35.0 * 541.leela_r 16 760 34.8 * 16 757 35.0 S 548.exchange2_r 16 513 81.6 S 16 511 82.0 * 548.exchange2_r 16 511 82.1 * 16 512 81.9 S 548.exchange2_r 16 508 82.6 S 16 511 82.1 S 557.xz_r 16 551 31.4 * 16 550 31.4 S 557.xz_r 16 554 31.2 S 16 551 31.4 S 557.xz_r 16 548 31.5 S 16 551 31.4 * ================================================================================= 500.perlbench_r 16 789 32.3 * 16 637 40.0 * 502.gcc_r 16 589 38.5 * 16 499 45.4 * 505.mcf_r 16 480 53.8 * 16 480 53.9 * 520.omnetpp_r 16 791 26.5 * 16 779 26.9 * 523.xalancbmk_r 16 351 48.1 * 16 303 55.8 * 525.x264_r 16 326 85.9 * 16 317 88.4 * 531.deepsjeng_r 16 491 37.4 * 16 489 37.5 * 541.leela_r 16 760 34.8 * 16 757 35.0 * 548.exchange2_r 16 511 82.1 * 16 511 82.0 * 557.xz_r 16 551 31.4 * 16 551 31.4 * SPECrate2017_int_base 43.6 SPECrate2017_int_peak 46.2 HARDWARE -------- CPU Name: Intel Xeon Silver 4112 Max MHz.: 3000 Nominal: 2600 Enabled: 8 cores, 2 chips, 2 threads/core Orderable: 1,2 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 8.25 MB I+D on chip per chip Other: None Memory: 384 GB (12 x 32 GB 2Rx4 PC4-2666V-R, running at 2400) Storage: 1 x 800 GB SAS SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) Kernel 4.4.21-69-default Compiler: C/C++: Version 18.0.0.128 of Intel C/C++ Compiler for Linux; Fortran: Version 18.0.0.128 of Intel Fortran Compiler for Linux Parallel: No Firmware: Lenovo BIOS Version TEE119J 1.20 released Sep-2017 File System: btrfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc: jemalloc memory allocator library V5.0.1; jemalloc: configured and built at default for 32bit (i686) and 64bit (x86_64) targets; jemalloc: built with the RedHat Enterprise 7.4, and the system compiler gcc 4.8.5; jemalloc: sources avilable from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017.1.0.2.ic18.0/lib/ia32:/home/cpu2017.1.0.2.ic18.0/lib/intel64" LD_LIBRARY_PATH = "$LD_LIBRARY_PATH:/home/cpu2017.1.0.2.ic18.0/je5.0.1-32:/home/cpu2017.1.0.2.ic18.0/je5.0.1-64" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu Platform Notes -------------- BIOS configuration: Choose Operating Mode set to Maximum Performance DCU Streamer Prefetcher set to Enable MONITORMWAIT set to Enable SNC set to Enable LLC dead line alloc set to Disable XPT Prefetcher set to Enable Sysinfo program /home/cpu2017.1.0.2.ic18.0/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-g50d Mon Oct 30 03:02:47 2017 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4112 CPU @ 2.60GHz 2 "physical id"s (chips) 16 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 4 siblings : 8 physical 0: cores 1 2 3 4 physical 1: cores 1 2 4 5 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 16 On-line CPU(s) list: 0-15 Thread(s) per core: 2 Core(s) per socket: 4 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Silver 4112 CPU @ 2.60GHz Stepping: 4 CPU MHz: 2593.908 BogoMIPS: 5187.81 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 8448K NUMA node0 CPU(s): 0-3,8-11 NUMA node1 CPU(s): 4-7,12-15 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb pln pts dtherm intel_pt tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 8448 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 8 9 10 11 node 0 size: 193111 MB node 0 free: 192409 MB node 1 cpus: 4 5 6 7 12 13 14 15 node 1 size: 193504 MB node 1 free: 192818 MB node distances: node 0 1 0: 10 21 1: 21 10 From /proc/meminfo MemTotal: 395894288 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-g50d 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Oct 30 03:01 SPEC is set to: /home/cpu2017.1.0.2.ic18.0 Filesystem Type Size Used Avail Use% Mounted on /dev/sda2 btrfs 744G 121G 623G 17% /home Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Lenovo -[TEE119J-1.20]- 09/06/2017 Memory: 12x Hynix HMA84GR7AFR4N-VK 32 GB 2 rank 2666, configured at 2400 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 502.gcc_r(peak) ------------------------------------------------------------------------------ icc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base) 541.leela_r(base) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak) 541.leela_r(peak) ------------------------------------------------------------------------------ icpc (ICC) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ ifort (IFORT) 18.0.0 20170811 Copyright (C) 1985-2017 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Base Other Flags ---------------- C benchmarks: -m64 -std=c11 C++ benchmarks: -m64 Fortran benchmarks: -m64 Peak Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 502.gcc_r: -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc 525.x264_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-alias -L/usr/local/je5.0.1-64/lib -ljemalloc 557.xz_r: Same as 505.mcf_r C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc 523.xalancbmk_r: -L/opt/intel/compilers_and_libraries_2018/linux/lib/ia32 -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Other Flags ---------------- C benchmarks (except as noted below): -m64 -std=c11 502.gcc_r: -m32 -std=c11 C++ benchmarks (except as noted below): -m64 523.xalancbmk_r: -m32 Fortran benchmarks: -m64 The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.html http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-SKL-A.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.xml http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-SKL-A.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. -------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.2 on 2017-10-29 15:02:46-0400. Report generated on 2018-10-31 17:00:03 by CPU2017 ASCII formatter v6067. Originally published on 2018-01-10.