SPEC(R) CPU2017 Integer Rate Result Cisco Systems Cisco UCS C125 (AMD EPYC 7281) CPU2017 License: 9019 Test date: Jun-2018 Test sponsor: Cisco Systems Hardware availability: Aug-2018 Tested by: Cisco Systems Software availability: May-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 64 873 117 S 64 851 120 S 500.perlbench_r 64 872 117 * 64 844 121 S 500.perlbench_r 64 870 117 S 64 845 121 * 502.gcc_r 64 719 126 * 32 326 139 S 502.gcc_r 64 720 126 S 32 327 138 S 502.gcc_r 64 704 129 S 32 326 139 * 505.mcf_r 64 542 191 S 64 515 201 S 505.mcf_r 64 541 191 * 64 516 200 S 505.mcf_r 64 541 191 S 64 515 201 * 520.omnetpp_r 64 887 94.6 S 64 834 101 * 520.omnetpp_r 64 873 96.2 * 64 829 101 S 520.omnetpp_r 64 873 96.2 S 64 836 100 S 523.xalancbmk_r 64 473 143 S 64 382 177 S 523.xalancbmk_r 64 471 143 S 64 372 182 S 523.xalancbmk_r 64 472 143 * 64 376 180 * 525.x264_r 64 376 298 * 64 321 349 S 525.x264_r 64 385 291 S 64 323 347 S 525.x264_r 64 375 299 S 64 322 348 * 531.deepsjeng_r 64 482 152 S 64 482 152 S 531.deepsjeng_r 64 483 152 * 64 482 152 S 531.deepsjeng_r 64 483 152 S 64 482 152 * 541.leela_r 64 819 129 * 64 788 134 S 541.leela_r 64 821 129 S 64 788 134 * 541.leela_r 64 817 130 S 64 788 134 S 548.exchange2_r 64 589 285 * 64 588 285 * 548.exchange2_r 64 577 290 S 64 598 281 S 548.exchange2_r 64 598 281 S 64 569 295 S 557.xz_r 64 754 91.7 S 64 682 101 S 557.xz_r 64 758 91.2 S 64 683 101 * 557.xz_r 64 757 91.3 * 64 684 101 S ================================================================================= 500.perlbench_r 64 872 117 * 64 845 121 * 502.gcc_r 64 719 126 * 32 326 139 * 505.mcf_r 64 541 191 * 64 515 201 * 520.omnetpp_r 64 873 96.2 * 64 834 101 * 523.xalancbmk_r 64 472 143 * 64 376 180 * 525.x264_r 64 376 298 * 64 322 348 * 531.deepsjeng_r 64 483 152 * 64 482 152 * 541.leela_r 64 819 129 * 64 788 134 * 548.exchange2_r 64 589 285 * 64 588 285 * 557.xz_r 64 757 91.3 * 64 683 101 * SPECrate2017_int_base 150 SPECrate2017_int_peak 162 HARDWARE -------- CPU Name: AMD EPYC 7281 Max MHz.: 2700 Nominal: 2100 Enabled: 32 cores, 2 chips, 2 threads/core Orderable: 1,2 chip Cache L1: 64 KB I + 32 KB D on chip per core L2: 512 KB I+D on chip per core L3: 32 MB I+D on chip per chip, 4 MB shared / 2 cores Other: None Memory: 1 TB (16 x 64 GB 4Rx4 PC4-2667V-R) Storage: 600 GB SAS HDD, 15K RPM Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP3 x86_64 kernel 4.4.120-94.17-default Compiler: C/C++: Version 1.0.0 of AOCC Fortran: Version 4.8.2 of GCC Parallel: No Firmware: Cisco Systems, Inc. BIOS Version C125.4.0.0.16.0511180518 released May-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc general purpose malloc implementation v4.5.0 Submit Notes ------------ The config file option 'submit' was used. 'numactl' was used to bind copies to the cores. See the configuration file for details. Operating System Notes ---------------------- 'ulimit -s unlimited' was used to set environment stack size 'ulimit -l 2097152' was used to set environment locked pages in memory limit runspec command invoked through numactl i.e.: numactl --interleave=all runspec Set dirty_ratio=8 to limit dirty cache to 8% of memory Set swappiness=1 to swap only if necessary Set zone_reclaim_mode=1 to free local node memory and avoid remote memory sync then drop_caches=3 to reset caches before invoking runcpu dirty_ratio, swappiness, zone_reclaim_mode and drop_caches were all set using privileged echo (e.g. echo 1 > /proc/sys/vm/swappiness). Transparent huge pages were enabled for this run (OS default) Huge pages were not configured for this run. General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2017/amd1704-rate-libs-revC/64;/opt/cpu2017/amd1704-rate-libs-revC/32:" MALLOC_CONF = "lg_chunk:26" The AMD64 AOCC Compiler Suite is available at http://developer.amd.com/amd-aocc/ Binaries were compiled on a system with 2x AMD EPYC 7601 CPU + 512GB Memory using RHEL 7.4 jemalloc, a general purpose malloc implementation, was obtained at https://github.com/jemalloc/jemalloc/releases/download/4.5.0/jemalloc-4.5.0.tar.bz2 jemalloc was built with GCC v4.8.5 in RHEL v7.2 under default conditions. jemalloc uses environment variable MALLOC_CONF with values narenas and lg_chunk: narenas: sets the maximum number of arenas to use for automatic multiplexing of threads and arenas. lg_chunk: set the virtual memory chunk size (log base 2). For example, lg_chunk:21 sets the default chunk size to 2^21 = 2MiB. The AOCC Gold Linker plugin was installed and used for the link stage. The AOCC Fortran Plugin version 1.0 was used to leverage AOCC optimizers with gfortran. It is available here: http://developer.amd.com/amd-aocc/ NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Platform Notes -------------- BIOS Settings: Performance Determinism set to Power Deterministic Sysinfo program /opt/cpu2017/bin/sysinfo Rev: r5797 of 2017-06-14 96c45e4568ad54c135fd618bcc091c0f running on linux-7bdx Mon Jan 3 00:45:03 2011 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : AMD EPYC 7281 16-Core Processor 2 "physical id"s (chips) 64 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 16 siblings : 32 physical 0: cores 0 1 4 5 8 9 12 13 16 17 20 21 24 25 28 29 physical 1: cores 0 1 4 5 8 9 12 13 16 17 20 21 24 25 28 29 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 64 On-line CPU(s) list: 0-63 Thread(s) per core: 2 Core(s) per socket: 16 Socket(s): 2 NUMA node(s): 8 Vendor ID: AuthenticAMD CPU family: 23 Model: 1 Model name: AMD EPYC 7281 16-Core Processor Stepping: 2 CPU MHz: 2100.000 CPU max MHz: 2100.0000 CPU min MHz: 1200.0000 BogoMIPS: 4191.97 Virtualization: AMD-V L1d cache: 32K L1i cache: 64K L2 cache: 512K L3 cache: 4096K NUMA node0 CPU(s): 0-3,32-35 NUMA node1 CPU(s): 4-7,36-39 NUMA node2 CPU(s): 8-11,40-43 NUMA node3 CPU(s): 12-15,44-47 NUMA node4 CPU(s): 16-19,48-51 NUMA node5 CPU(s): 20-23,52-55 NUMA node6 CPU(s): 24-27,56-59 NUMA node7 CPU(s): 28-31,60-63 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc extd_apicid amd_dcm aperfmperf eagerfpu pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_l2 mwaitx arat cpb hw_pstate retpoline retpoline_amd npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold vmmcall avic fsgsbase bmi1 avx2 smep bmi2 rdseed adx smap clflushopt sha_ni xsaveopt xsavec xgetbv1 clzero irperf ibpb overflow_recov succor smca /proc/cpuinfo cache data cache size : 512 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 3 32 33 34 35 node 0 size: 128831 MB node 0 free: 128654 MB node 1 cpus: 4 5 6 7 36 37 38 39 node 1 size: 129021 MB node 1 free: 128909 MB node 2 cpus: 8 9 10 11 40 41 42 43 node 2 size: 129021 MB node 2 free: 128895 MB node 3 cpus: 12 13 14 15 44 45 46 47 node 3 size: 129021 MB node 3 free: 128891 MB node 4 cpus: 16 17 18 19 48 49 50 51 node 4 size: 129021 MB node 4 free: 128916 MB node 5 cpus: 20 21 22 23 52 53 54 55 node 5 size: 129021 MB node 5 free: 128913 MB node 6 cpus: 24 25 26 27 56 57 58 59 node 6 size: 129021 MB node 6 free: 128870 MB node 7 cpus: 28 29 30 31 60 61 62 63 node 7 size: 116923 MB node 7 free: 116812 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 16 16 16 32 32 32 32 1: 16 10 16 16 32 32 32 32 2: 16 16 10 16 32 32 32 32 3: 16 16 16 10 32 32 32 32 4: 32 32 32 32 10 16 16 16 5: 32 32 32 32 16 10 16 16 6: 32 32 32 32 16 16 10 16 7: 32 32 32 32 16 16 16 10 From /proc/meminfo MemTotal: 1044359956 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 3 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP3" VERSION_ID="12.3" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP3" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp3" uname -a: Linux linux-7bdx 4.4.120-94.17-default #1 SMP Wed Mar 14 17:23:00 UTC 2018 (cf3a7bb) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Jan 2 03:28 SPEC is set to: /opt/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 xfs 450G 19G 432G 5% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C125.4.0.0.16.0511180518 05/11/2018 Memory: 16x 0xCE00 M386A8K40BM2-CTD 64 GB 4 rank 2667 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== CC 502.gcc_r(peak) ------------------------------------------------------------------------------ AOCC.LLVM.4.0.0.B35.2017_04_26 clang version 4.0.0 (CLANG:) (based on LLVM AOCC.LLVM.4.0.0.B35.2017_04_26) Target: i386-unknown-linux-gnu Thread model: posix InstalledDir: /root/work/compilers/AOCC-1.0-Compiler/bin ------------------------------------------------------------------------------ ============================================================================== CXXC 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ AOCC.LLVM.4.0.0.B35.2017_04_26 clang version 4.0.0 (CLANG:) (based on LLVM AOCC.LLVM.4.0.0.B35.2017_04_26) Target: i386-unknown-linux-gnu Thread model: posix InstalledDir: /root/work/compilers/AOCC-1.0-Compiler/bin ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base) 557.xz_r(base, peak) ------------------------------------------------------------------------------ AOCC.LLVM.4.0.0.B35.2017_04_26 clang version 4.0.0 (CLANG:) (based on LLVM AOCC.LLVM.4.0.0.B35.2017_04_26) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /root/work/compilers/AOCC-1.0-Compiler/bin ------------------------------------------------------------------------------ ============================================================================== CXXC 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) 531.deepsjeng_r(base, peak) 541.leela_r(base) ------------------------------------------------------------------------------ AOCC.LLVM.4.0.0.B35.2017_04_26 clang version 4.0.0 (CLANG:) (based on LLVM AOCC.LLVM.4.0.0.B35.2017_04_26) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /root/work/compilers/AOCC-1.0-Compiler/bin ------------------------------------------------------------------------------ ============================================================================== CC 500.perlbench_r(peak) 525.x264_r(peak) ------------------------------------------------------------------------------ AOCC.LLVM.4.0.0.B35.2017_04_26 clang version 4.0.0 (CLANG:) (based on LLVM AOCC.LLVM.4.0.0.B35.2017_04_26) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /root/work/compilers/AOCC-1.0-Compiler/bin ------------------------------------------------------------------------------ ============================================================================== CXXC 541.leela_r(peak) ------------------------------------------------------------------------------ AOCC.LLVM.4.0.0.B35.2017_04_26 clang version 4.0.0 (CLANG:) (based on LLVM AOCC.LLVM.4.0.0.B35.2017_04_26) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /root/work/compilers/AOCC-1.0-Compiler/bin ------------------------------------------------------------------------------ ============================================================================== FC 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ GNU Fortran (GCC) 4.8.2 Copyright (C) 2013 Free Software Foundation, Inc. GNU Fortran comes with NO WARRANTY, to the extent permitted by law. You may redistribute copies of GNU Fortran under the terms of the GNU General Public License. For more information about these matters, see the file named COPYING ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: clang C++ benchmarks: clang++ Fortran benchmarks: clang gfortran Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LINUX_X64 -DSPEC_LP64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LINUX -DSPEC_LP64 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -disable-vect-cmp -O3 -ffast-math -march=znver1 -fstruct-layout=2 -mllvm -unroll-threshold=100 -fremap-arrays -mno-avx2 -inline-threshold=1000 -z muldefs -ljemalloc C++ benchmarks: -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -disable-vect-cmp -O3 -march=znver1 -mllvm -unroll-threshold=100 -finline-aggressive -fremap-arrays -inline-threshold=1000 -z muldefs -ljemalloc Fortran benchmarks: -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -disable-vect-cmp -O3 -mavx -madx -funroll-loops -ffast-math -z muldefs -Ofast -fdefault-integer-8 -fplugin=dragonegg.so -fplugin-arg-dragonegg-llvm-option=" -enable-iv-split -inline-threshold:1000 -disable-vect-cmp" -ljemalloc -lgfortran -lamdlibm Peak Compiler Invocation ------------------------ C benchmarks: clang C++ benchmarks: clang++ Fortran benchmarks: clang gfortran Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LINUX_X64 -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -fprofile-instr-generate(pass 1) -fprofile-instr-use(pass 2) -Ofast -march=znver1 -fstruct-layout=3 -mllvm -vectorize-memory-aggressively -mno-avx2 -unroll-threshold=100 -fremap-arrays -inline-threshold=1000 -ljemalloc 502.gcc_r: -m32 -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -Ofast -march=znver1 -fstruct-layout=3 -mllvm -vectorize-memory-aggressively -mno-avx2 -unroll-threshold=100 -fremap-arrays -inline-threshold=1000 -fgnu89-inline -D_FILE_OFFSET_BITS=64(*) -ljemalloc 505.mcf_r: -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -Ofast -march=znver1 -fstruct-layout=3 -mllvm -vectorize-memory-aggressively -mno-avx2 -unroll-threshold=100 -fremap-arrays -inline-threshold=1000 -ljemalloc 525.x264_r: Same as 500.perlbench_r 557.xz_r: Same as 505.mcf_r C++ benchmarks: 520.omnetpp_r: -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -Ofast -march=znver1 -finline-aggressive -mllvm -unroll-threshold=100 -fremap-arrays -inline-threshold=1000 -ljemalloc 523.xalancbmk_r: -m32 -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -Ofast -march=znver1 -finline-aggressive -mllvm -unroll-threshold=100 -fremap-arrays -inline-threshold=1000 -D_FILE_OFFSET_BITS=64(*) -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -fprofile-instr-generate(pass 1) -fprofile-instr-use(pass 2) -Ofast -march=znver1 -mllvm -unroll-count=8 -unroll-threshold=100 -ljemalloc Fortran benchmarks: -flto -Wl, -plugin-opt= -merge-constant -lsr-in-nested-loop -O3 -mavx2 -madx -funroll-loops -ffast-math -Ofast -fdefault-integer-8 -fplugin=dragonegg.so -fplugin-arg-dragonegg-llvm-option=" -enable-iv-split -inline-threshold:1000 -disable-vect-cmp" -ljemalloc -lgfortran -lamdlibm (*) Indicates optimization flags found in portability variables Peak Other Flags ---------------- C benchmarks: 502.gcc_r: -L/root/work/lib/jemalloc/lib32 C++ benchmarks: 523.xalancbmk_r: -L/root/work/lib/jemalloc/lib32 The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/aocc100-flags-revC-I.2018-02-16.html http://www.spec.org/cpu2017/flags/gcc.2018-02-16.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-AMD-V1-revA.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/aocc100-flags-revC-I.2018-02-16.xml http://www.spec.org/cpu2017/flags/gcc.2018-02-16.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-AMD-V1-revA.xml SPEC is a registered trademark of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ------------------------------------------------------------------------------------------------------ For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2018 Standard Performance Evaluation Corporation Tested with SPEC CPU2017 v1.0.2 on 2011-01-03 03:45:02-0500. Report generated on 2018-10-31 19:14:11 by CPU2017 ASCII formatter v6067. Originally published on 2018-10-02.