SPEC CPU(R)2017 Integer Rate Result Cisco Systems Cisco UCS C480 M5 (Intel Xeon Gold 6142M, 2.60 GHz) CPU2017 License: 9019 Test date: Feb-2019 Test sponsor: Cisco Systems Hardware availability: Aug-2017 Tested by: Cisco Systems Software availability: Oct-2018 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 128 751 271 * 128 623 327 S 500.perlbench_r 128 754 270 S 128 621 328 * 500.perlbench_r 128 742 274 S 128 619 329 S 502.gcc_r 128 628 288 S 128 516 351 * 502.gcc_r 128 624 290 S 128 515 352 S 502.gcc_r 128 628 289 * 128 518 350 S 505.mcf_r 128 477 434 S 128 475 436 S 505.mcf_r 128 475 435 * 128 483 429 * 505.mcf_r 128 475 435 S 128 493 419 S 520.omnetpp_r 128 782 215 S 128 776 216 S 520.omnetpp_r 128 782 215 * 128 778 216 * 520.omnetpp_r 128 783 214 S 128 804 209 S 523.xalancbmk_r 128 401 337 * 128 321 422 * 523.xalancbmk_r 128 401 337 S 128 320 422 S 523.xalancbmk_r 128 398 340 S 128 321 421 S 525.x264_r 128 288 777 S 128 277 811 S 525.x264_r 128 289 775 * 128 276 812 S 525.x264_r 128 292 769 S 128 276 812 * 531.deepsjeng_r 128 448 328 S 128 450 326 S 531.deepsjeng_r 128 447 328 S 128 454 323 * 531.deepsjeng_r 128 448 328 * 128 463 317 S 541.leela_r 128 674 314 S 128 678 313 S 541.leela_r 128 681 311 S 128 663 320 S 541.leela_r 128 679 312 * 128 671 316 * 548.exchange2_r 128 482 695 * 128 482 695 S 548.exchange2_r 128 482 696 S 128 482 696 * 548.exchange2_r 128 483 695 S 128 482 696 S 557.xz_r 128 538 257 S 128 537 257 S 557.xz_r 128 537 258 S 128 582 238 * 557.xz_r 128 538 257 * 128 587 235 S ================================================================================= 500.perlbench_r 128 751 271 * 128 621 328 * 502.gcc_r 128 628 289 * 128 516 351 * 505.mcf_r 128 475 435 * 128 483 429 * 520.omnetpp_r 128 782 215 * 128 778 216 * 523.xalancbmk_r 128 401 337 * 128 321 422 * 525.x264_r 128 289 775 * 128 276 812 * 531.deepsjeng_r 128 448 328 * 128 454 323 * 541.leela_r 128 679 312 * 128 671 316 * 548.exchange2_r 128 482 695 * 128 482 696 * 557.xz_r 128 538 257 * 128 582 238 * SPECrate(R)2017_int_base 358 SPECrate(R)2017_int_peak 379 HARDWARE -------- CPU Name: Intel Xeon Gold 6142M Max MHz: 3700 Nominal: 2600 Enabled: 64 cores, 4 chips, 2 threads/core Orderable: 2,4 Chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 22 MB I+D on chip per chip Other: None Memory: 1536 GB (48 x 32 GB 2Rx4 PC4-2666V-R) Storage: 1 x 1 TB HDD, 7.2K RPM Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP2 (x86_64) 4.4.120-92.70-default Compiler: C/C++: Version 19.0.0.117 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.0.117 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 3.1.3e released Jun-2018 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: -- Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" General Notes ------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64" Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc: configured and built at default for 32bit (i686) and 64bit (x86_64) targets; jemalloc: built with the RedHat Enterprise 7.4, and the system compiler gcc 4.8.5; jemalloc: sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Intel HyperThreading Technology set to Enabled CPU performance set to Enterprise Power Performance Tuning set to OS Controls SNC set to Enabled IMC Interleaving set to 1-way Interleave Patrol Scrub set to Disabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9 running on linux-9r4j Sat Feb 9 05:31:36 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6142M CPU @ 2.60GHz 4 "physical id"s (chips) 128 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 16 siblings : 32 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 2: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 physical 3: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 128 On-line CPU(s) list: 0-127 Thread(s) per core: 2 Core(s) per socket: 16 Socket(s): 4 NUMA node(s): 8 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6142M CPU @ 2.60GHz Stepping: 4 CPU MHz: 3300.000 CPU max MHz: 3700.0000 CPU min MHz: 1000.0000 BogoMIPS: 5194.38 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 22528K NUMA node0 CPU(s): 0-3,8-11,64-67,72-75 NUMA node1 CPU(s): 4-7,12-15,68-71,76-79 NUMA node2 CPU(s): 16-19,24-27,80-83,88-91 NUMA node3 CPU(s): 20-23,28-31,84-87,92-95 NUMA node4 CPU(s): 32-35,40-43,96-99,104-107 NUMA node5 CPU(s): 36-39,44-47,100-103,108-111 NUMA node6 CPU(s): 48-51,56-59,112-115,120-123 NUMA node7 CPU(s): 52-55,60-63,116-119,124-127 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts dtherm hwp hwp_act_window hwp_epp hwp_pkg_req intel_pt rsb_ctxsw spec_ctrl stibp retpoline kaiser tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc /proc/cpuinfo cache data cache size : 22528 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 3 8 9 10 11 64 65 66 67 72 73 74 75 node 0 size: 192093 MB node 0 free: 191896 MB node 1 cpus: 4 5 6 7 12 13 14 15 68 69 70 71 76 77 78 79 node 1 size: 193528 MB node 1 free: 193323 MB node 2 cpus: 16 17 18 19 24 25 26 27 80 81 82 83 88 89 90 91 node 2 size: 193528 MB node 2 free: 193185 MB node 3 cpus: 20 21 22 23 28 29 30 31 84 85 86 87 92 93 94 95 node 3 size: 193528 MB node 3 free: 193395 MB node 4 cpus: 32 33 34 35 40 41 42 43 96 97 98 99 104 105 106 107 node 4 size: 193528 MB node 4 free: 193413 MB node 5 cpus: 36 37 38 39 44 45 46 47 100 101 102 103 108 109 110 111 node 5 size: 193528 MB node 5 free: 193345 MB node 6 cpus: 48 49 50 51 56 57 58 59 112 113 114 115 120 121 122 123 node 6 size: 193528 MB node 6 free: 193413 MB node 7 cpus: 52 53 54 55 60 61 62 63 116 117 118 119 124 125 126 127 node 7 size: 193525 MB node 7 free: 193380 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 21 21 21 21 21 21 1: 11 10 21 21 21 21 21 21 2: 21 21 10 11 21 21 21 21 3: 21 21 11 10 21 21 21 21 4: 21 21 21 21 10 11 21 21 5: 21 21 21 21 11 10 21 21 6: 21 21 21 21 21 21 10 11 7: 21 21 21 21 21 21 11 10 From /proc/meminfo MemTotal: 1583913184 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux linux-9r4j 4.4.120-92.70-default #1 SMP Wed Mar 14 15:59:43 UTC 2018 (52a83de) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2017-5754 (Meltdown): Mitigation: PTI CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB run-level 3 Dec 31 19:13 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 xfs 930G 35G 896G 4% / Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS Cisco Systems, Inc. C480M5.3.1.3e.0.0613181101 06/13/2018 Memory: 48x 0xCE00 M393A4K40BB2-CTD 32 GB 2 rank 2666 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.0.117 Build 20180804 Copyright (C) 1985-2018 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.0.117/linux/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.0.117/linux/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-strict-overflow -L/usr/local/je5.0.1-64/lib -ljemalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc 525.x264_r: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -fno-alias -L/usr/local/je5.0.1-64/lib -ljemalloc 557.xz_r: Same as 505.mcf_r C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-64/lib -ljemalloc 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-mem-layout-trans=3 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=3 -nostandard-realloc-lhs -align array32byte -L/usr/local/je5.0.1-64/lib -ljemalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0-official-linux64.2019-01-15.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0-official-linux64.2019-01-15.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.0.5 on 2019-02-09 05:31:35-0500. Report generated on 2020-07-01 14:38:35 by CPU2017 text formatter v6255. Originally published on 2019-03-05.