SPEC CPU(R)2017 Integer Rate Result Supermicro SuperServer 5019C-WR (X11SCW-F , Intel Xeon E-2288G) CPU2017 License: 001176 Test date: Nov-2019 Test sponsor: Supermicro Hardware availability: May-2019 Tested by: Supermicro Software availability: Jun-2019 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 16 499 51.0 * 16 432 59.0 * 500.perlbench_r 16 497 51.2 S 16 433 58.8 S 500.perlbench_r 16 500 50.9 S 16 431 59.1 S 502.gcc_r 16 515 44.0 * 16 407 55.7 * 502.gcc_r 16 515 44.0 S 16 410 55.3 S 502.gcc_r 16 509 44.5 S 16 405 55.9 S 505.mcf_r 16 407 63.5 S 16 407 63.5 S 505.mcf_r 16 406 63.7 S 16 406 63.7 S 505.mcf_r 16 407 63.5 * 16 407 63.5 * 520.omnetpp_r 16 933 22.5 S 16 939 22.4 S 520.omnetpp_r 16 937 22.4 * 16 938 22.4 S 520.omnetpp_r 16 938 22.4 S 16 939 22.4 * 523.xalancbmk_r 16 275 61.4 * 16 249 68.0 * 523.xalancbmk_r 16 275 61.5 S 16 249 67.9 S 523.xalancbmk_r 16 278 60.8 S 16 248 68.1 S 525.x264_r 16 199 141 S 16 192 146 S 525.x264_r 16 198 142 * 16 192 146 * 525.x264_r 16 197 143 S 16 193 145 S 531.deepsjeng_r 16 338 54.2 * 16 337 54.3 * 531.deepsjeng_r 16 338 54.3 S 16 337 54.4 S 531.deepsjeng_r 16 338 54.2 S 16 338 54.3 S 541.leela_r 16 527 50.3 * 16 527 50.2 S 541.leela_r 16 517 51.2 S 16 523 50.7 * 541.leela_r 16 528 50.1 S 16 521 50.8 S 548.exchange2_r 16 305 138 S 16 305 137 S 548.exchange2_r 16 306 137 S 16 304 138 S 548.exchange2_r 16 305 137 * 16 305 138 * 557.xz_r 16 544 31.8 S 16 544 31.8 S 557.xz_r 16 543 31.8 S 16 543 31.8 S 557.xz_r 16 544 31.8 * 16 544 31.8 * ================================================================================= 500.perlbench_r 16 499 51.0 * 16 432 59.0 * 502.gcc_r 16 515 44.0 * 16 407 55.7 * 505.mcf_r 16 407 63.5 * 16 407 63.5 * 520.omnetpp_r 16 937 22.4 * 16 939 22.4 * 523.xalancbmk_r 16 275 61.4 * 16 249 68.0 * 525.x264_r 16 198 142 * 16 192 146 * 531.deepsjeng_r 16 338 54.2 * 16 337 54.3 * 541.leela_r 16 527 50.3 * 16 523 50.7 * 548.exchange2_r 16 305 137 * 16 305 138 * 557.xz_r 16 544 31.8 * 16 544 31.8 * SPECrate(R)2017_int_base 56.5 SPECrate(R)2017_int_peak 59.5 HARDWARE -------- CPU Name: Intel Xeon E-2288G Max MHz: 5000 Nominal: 3700 Enabled: 8 cores, 1 chip, 2 threads/core Orderable: 1 chip Cache L1: 32 KB I + 32 KB D on chip per core L2: 256 KB I+D on chip per core L3: 16 MB I+D on chip per chip Other: None Memory: 64 GB (4 x 16 GB 2Rx8 PC4-2666V-E) Storage: 1 x 200 GB SATA III SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 SP1 (x86_64) Kernel 4.12.14-195-default Compiler: C/C++: Version 19.0.4.227 of Intel C/C++ Compiler for Linux; Fortran: Version 19.0.4.227 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 1.0b released May-2019 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: -- Submit Notes ------------ The taskset mechanism was used to bind copies to processors. The config file option 'submit' was used to generate taskset commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/lib/ia32:/home/cpu2017/je5.0.1- 32" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM memory using Redhat Enterprise Linux 7.5 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011 running on 135-172-176 Mon Nov 25 17:35:32 2019 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) E-2288G CPU @ 3.70GHz 1 "physical id"s (chips) 16 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian Address sizes: 39 bits physical, 48 bits virtual CPU(s): 16 On-line CPU(s) list: 0-15 Thread(s) per core: 2 Core(s) per socket: 8 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 158 Model name: Intel(R) Xeon(R) E-2288G CPU @ 3.70GHz Stepping: 13 CPU MHz: 3700.000 CPU max MHz: 5000.0000 CPU min MHz: 800.0000 BogoMIPS: 7392.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 256K L3 cache: 16384K NUMA node0 CPU(s): 0-15 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb invpcid_single ssbd ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm mpx rdseed adx smap clflushopt intel_pt xsaveopt xsavec xgetbv1 xsaves dtherm ida arat pln pts hwp hwp_notify hwp_act_window hwp_epp md_clear flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 16384 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 1 nodes (0) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 node 0 size: 64315 MB node 0 free: 63700 MB node distances: node 0 0: 10 From /proc/meminfo MemTotal: 65858984 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15-SP1" VERSION_ID="15.1" PRETTY_NAME="SUSE Linux Enterprise Server 15 SP1" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15:sp1" uname -a: Linux 135-172-176 4.12.14-195-default #1 SMP Tue May 7 10:55:11 UTC 2019 (8fba516) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling run-level 3 Nov 25 10:37 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 xfs 175G 4.2G 171G 3% /home From /sys/devices/virtual/dmi/id BIOS: American Megatrends Inc. 1.0b 05/16/2019 Vendor: Supermicro Product: Super Server Serial: 0123456789 Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 4x Micron 18ADF2G72AZ-2G6H1R 16 GB 2 rank 2667 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 502.gcc_r(peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) | 525.x264_r(base, peak) 557.xz_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 523.xalancbmk_r(peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on IA-32, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base) | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.0.4.227 Build 20190416 Copyright (C) 1985-2019 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc -m64 -std=c11 C++ benchmarks: icpc -m64 Fortran benchmarks: ifort -m64 Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc C++ benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m64 -std=c11 502.gcc_r: icc -m32 -std=c11 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/ia32_lin C++ benchmarks (except as noted below): icpc -m64 523.xalancbmk_r: icpc -m32 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/ia32_lin Fortran benchmarks: ifort -m64 Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -D_FILE_OFFSET_BITS=64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-strict-overflow -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 502.gcc_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-32/lib -ljemalloc 505.mcf_r: basepeak = yes 525.x264_r: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -fno-alias -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 557.xz_r: basepeak = yes C++ benchmarks: 520.omnetpp_r: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc 523.xalancbmk_r: -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX2 -O3 -no-prec-div -qopt-mem-layout-trans=4 -L/usr/local/je5.0.1-32/lib -ljemalloc 531.deepsjeng_r: Same as 520.omnetpp_r 541.leela_r: Same as 520.omnetpp_r Fortran benchmarks: -Wl,-z,muldefs -xCORE-AVX2 -ipo -O3 -no-prec-div -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -L/usr/local/IntelCompiler19/compilers_and_libraries_2019.4.227/linux/compiler/lib/intel64 -lqkmalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html http://www.spec.org/cpu2017/flags/Default-Platform-Flags.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml http://www.spec.org/cpu2017/flags/Default-Platform-Flags.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.0 on 2019-11-25 04:35:32-0500. Report generated on 2020-01-08 12:06:17 by CPU2017 text formatter v6255. Originally published on 2020-01-07.