SPEC CPU(R)2017 Floating Point Rate Result Huawei Huawei 2288H V5 (Intel Xeon Gold 6252N) Test Sponsor: China Academy of Information and Communications Technology CPU2017 License: 6177 Test date: Sep-2020 Test sponsor: China Academy of Information and Communications Technology Hardware availability: Apr-2019 Tested by: China Academy of Information and Communications Technology Software availability: Apr-2020 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 503.bwaves_r 96 1745 552 * 503.bwaves_r 96 1748 551 S 503.bwaves_r 96 1745 552 S 507.cactuBSSN_r 96 312 390 * 507.cactuBSSN_r 96 313 388 S 507.cactuBSSN_r 96 311 391 S 508.namd_r 96 420 217 * 508.namd_r 96 420 217 S 508.namd_r 96 420 217 S 510.parest_r 96 1772 142 S 510.parest_r 96 1779 141 * 510.parest_r 96 1780 141 S 511.povray_r 96 688 326 S 511.povray_r 96 686 327 * 511.povray_r 96 685 327 S 519.lbm_r 96 765 132 * 519.lbm_r 96 764 132 S 519.lbm_r 96 765 132 S 521.wrf_r 96 864 249 S 521.wrf_r 96 890 242 S 521.wrf_r 96 888 242 * 526.blender_r 96 506 289 * 526.blender_r 96 505 289 S 526.blender_r 96 507 288 S 527.cam4_r 96 534 314 S 527.cam4_r 96 535 314 * 527.cam4_r 96 537 312 S 538.imagick_r 96 306 779 * 538.imagick_r 96 306 779 S 538.imagick_r 96 306 781 S 544.nab_r 96 330 490 * 544.nab_r 96 330 489 S 544.nab_r 96 329 491 S 549.fotonik3d_r 96 2159 173 S 549.fotonik3d_r 96 2156 174 * 549.fotonik3d_r 96 2152 174 S 554.roms_r 96 1383 110 * 554.roms_r 96 1381 110 S 554.roms_r 96 1384 110 S ================================================================================= 503.bwaves_r 96 1745 552 * 507.cactuBSSN_r 96 312 390 * 508.namd_r 96 420 217 * 510.parest_r 96 1779 141 * 511.povray_r 96 686 327 * 519.lbm_r 96 765 132 * 521.wrf_r 96 888 242 * 526.blender_r 96 506 289 * 527.cam4_r 96 535 314 * 538.imagick_r 96 306 779 * 544.nab_r 96 330 490 * 549.fotonik3d_r 96 2156 174 * 554.roms_r 96 1383 110 * SPECrate(R)2017_fp_base 273 SPECrate(R)2017_fp_peak Not Run HARDWARE -------- CPU Name: Intel Xeon Gold 6252N Max MHz: 3600 Nominal: 2300 Enabled: 48 cores, 2 chips, 2 threads/core Orderable: 1,2 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 1 MB I+D on chip per core L3: 35.75 MB I+D on chip per chip Other: None Memory: 768 GB (24 x 32 GB 2Rx4 PC4-2933Y-R) Storage: 1 x 800 GB SAS SSD Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 12 SP4 (x86_64) Kernel 4.12.14-94.41-default Compiler: C/C++: Version 19.1.1.217 of Intel C/C++ Compiler for Linux; Fortran: Version 19.1.1.217 of Intel Fortran Compiler for Linux Parallel: No Firmware: Version 6.83 released Jun-2019 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: Not Applicable Other: jemalloc memory allocator v5.0.1 Power Management: BIOS set to prefer performance at the cost of additional power usage. Compiler Notes -------------- The inconsistent Compiler version information under Compiler Version section is due to a discrepancy in Intel Compiler. The correct version of C/C++ compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux The correct version of Fortran compiler is: Version 19.1.1.217 Build 20200306 Compiler for Linux Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/opt/intel/compilers_and_libraries_2020.1.217/linux/compiler/lib/intel6 4:/usr/local/jemalloc64-5.0.1" MALLOC_CONF = "retain:true" General Notes ------------- Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with RedHat Enterprise 7.5 and the system compiler gcc 4.8.5. Sources are available from jemalloc.net or https://github.com/jemalloc/releases Platform Notes -------------- BIOS configuration: Power Policy Set to Performance SNC Set to Enabled IMC Interleaving Set to 1-way Interleave XPT Prefetch Set to Enabled Sysinfo program /spec2017/bin/sysinfo Rev: r6365 of 2019-08-21 295195f888a3d7edb1e6e46a485a0011 running on linux-j3dr Thu Sep 17 09:24:58 2020 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6252N CPU @ 2.30GHz 2 "physical id"s (chips) 96 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 24 siblings : 48 physical 0: cores 0 1 2 3 5 6 8 9 10 11 12 13 16 17 18 19 20 21 22 25 26 27 28 29 physical 1: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 16 17 18 19 20 21 25 26 27 28 29 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 96 On-line CPU(s) list: 0-95 Thread(s) per core: 2 Core(s) per socket: 24 Socket(s): 2 NUMA node(s): 4 Vendor ID: GenuineIntel CPU family: 6 Model: 85 Model name: Intel(R) Xeon(R) Gold 6252N CPU @ 2.30GHz Stepping: 7 CPU MHz: 2300.000 CPU max MHz: 3600.0000 CPU min MHz: 1000.0000 BogoMIPS: 4600.00 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 1024K L3 cache: 36608K NUMA node0 CPU(s): 0-3,6-8,12-14,19,20,48-51,54-56,60-62,67,68 NUMA node1 CPU(s): 4,5,9-11,15-18,21-23,52,53,57-59,63-66,69-71 NUMA node2 CPU(s): 24-27,31-33,37-39,43,44,72-75,79-81,85-87,91,92 NUMA node3 CPU(s): 28-30,34-36,40-42,45-47,76-78,82-84,88-90,93-95 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cdp_l3 invpcid_single ssbd mba ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local dtherm ida arat pln pts pku ospke avx512_vnni flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 36608 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 4 nodes (0-3) node 0 cpus: 0 1 2 3 6 7 8 12 13 14 19 20 48 49 50 51 54 55 56 60 61 62 67 68 node 0 size: 192045 MB node 0 free: 191194 MB node 1 cpus: 4 5 9 10 11 15 16 17 18 21 22 23 52 53 57 58 59 63 64 65 66 69 70 71 node 1 size: 193531 MB node 1 free: 192798 MB node 2 cpus: 24 25 26 27 31 32 33 37 38 39 43 44 72 73 74 75 79 80 81 85 86 87 91 92 node 2 size: 193502 MB node 2 free: 192941 MB node 3 cpus: 28 29 30 34 35 36 40 41 42 45 46 47 76 77 78 82 83 84 88 89 90 93 94 95 node 3 size: 193529 MB node 3 free: 192977 MB node distances: node 0 1 2 3 0: 10 11 21 21 1: 11 10 21 21 2: 21 21 10 11 3: 21 21 11 10 From /proc/meminfo MemTotal: 791151540 kB HugePages_Total: 0 Hugepagesize: 2048 kB From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 4 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP4" VERSION_ID="12.4" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP4" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp4" uname -a: Linux linux-j3dr 4.12.14-94.41-default #1 SMP Wed Oct 31 12:25:04 UTC 2018 (3090901) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: No status reported CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation, IBPB, IBRS_FW run-level 3 Sep 14 15:12 SPEC is set to: /spec2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 xfs 734G 39G 696G 6% / From /sys/devices/virtual/dmi/id BIOS: INSYDE Corp. 6.83 06/29/2019 Vendor: Huawei Product: 2288H V5 Product Family: Purley Serial: 210200351910KC000123 Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 24x Samsung M393A4K40CB2-CVF 32 GB 2 rank 2933 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 519.lbm_r(base) 538.imagick_r(base) 544.nab_r(base) ------------------------------------------------------------------------------ Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++ | 508.namd_r(base) 510.parest_r(base) ------------------------------------------------------------------------------ Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C | 511.povray_r(base) 526.blender_r(base) ------------------------------------------------------------------------------ Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 507.cactuBSSN_r(base) ------------------------------------------------------------------------------ Intel(R) C++ Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 503.bwaves_r(base) 549.fotonik3d_r(base) 554.roms_r(base) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 521.wrf_r(base) 527.cam4_r(base) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R) 64, Version 19.1.1.217 Build 20200306 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Compiler for applications running on Intel(R) 64, Version 2021.1 NextGen Build 20200304 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc C++ benchmarks: icpc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using both C and C++: icpc icc Benchmarks using Fortran, C, and C++: icpc icc ifort Base Portability Flags ---------------------- 503.bwaves_r: -DSPEC_LP64 507.cactuBSSN_r: -DSPEC_LP64 508.namd_r: -DSPEC_LP64 510.parest_r: -DSPEC_LP64 511.povray_r: -DSPEC_LP64 519.lbm_r: -DSPEC_LP64 521.wrf_r: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 526.blender_r: -DSPEC_LP64 -DSPEC_LINUX -funsigned-char 527.cam4_r: -DSPEC_LP64 -DSPEC_CASE_FLAG 538.imagick_r: -DSPEC_LP64 544.nab_r: -DSPEC_LP64 549.fotonik3d_r: -DSPEC_LP64 554.roms_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc64-5.0.1/ -ljemalloc C++ benchmarks: -m64 -qnextgen -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc64-5.0.1/ -ljemalloc Fortran benchmarks: -m64 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/ -ljemalloc Benchmarks using both Fortran and C: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/ -ljemalloc Benchmarks using both C and C++: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc64-5.0.1/ -ljemalloc Benchmarks using Fortran, C, and C++: -m64 -qnextgen -std=c11 -Wl,-plugin-opt=-x86-branches-within-32B-boundaries -Wl,-z,muldefs -fuse-ld=gold -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -O3 -ipo -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-multiple-gather-scatter-by-shuffles -nostandard-realloc-lhs -align array32byte -auto -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/ -ljemalloc The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revB.html http://www.spec.org/cpu2017/flags/CAICT-Platform-Settings-V1.2.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic19.1u1-official-linux64_revB.xml http://www.spec.org/cpu2017/flags/CAICT-Platform-Settings-V1.2.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2020 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.0 on 2020-09-16 21:24:57-0400. Report generated on 2020-10-27 16:15:40 by CPU2017 text formatter v6255. Originally published on 2020-10-27.