SPEC CPU(R)2017 Floating Point Speed Result Cisco Systems Cisco UCS C225 M6 (AMD EPYC 7773X 64-Core) CPU2017 License: 9019 Test date: Feb-2022 Test sponsor: Cisco Systems Hardware availability: Mar-2022 Tested by: Cisco Systems Software availability: Dec-2021 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 603.bwaves_s 64 143 413 S 64 143 412 S 603.bwaves_s 64 143 412 * 64 143 412 S 603.bwaves_s 64 143 412 S 64 143 412 * 607.cactuBSSN_s 64 52.3 319 S 64 52.3 319 S 607.cactuBSSN_s 64 52.2 319 * 64 52.2 319 * 607.cactuBSSN_s 64 52.0 320 S 64 52.0 320 S 619.lbm_s 64 67.5 77.6 S 64 65.1 80.5 * 619.lbm_s 64 67.5 77.6 S 64 65.2 80.4 S 619.lbm_s 64 67.5 77.6 * 64 65.0 80.6 S 621.wrf_s 64 68.4 193 S 64 65.4 202 * 621.wrf_s 64 66.4 199 S 64 66.3 200 S 621.wrf_s 64 67.3 196 * 64 64.7 204 S 627.cam4_s 64 56.1 158 S 64 55.8 159 * 627.cam4_s 64 56.2 158 * 64 55.7 159 S 627.cam4_s 64 56.2 158 S 64 57.6 154 S 628.pop2_s 64 138 86.0 S 64 138 86.0 S 628.pop2_s 64 138 85.8 S 64 138 85.8 S 628.pop2_s 64 138 86.0 * 64 138 86.0 * 638.imagick_s 64 49.6 291 * 64 49.6 291 * 638.imagick_s 64 50.5 286 S 64 50.5 286 S 638.imagick_s 64 49.5 291 S 64 49.5 291 S 644.nab_s 64 44.7 391 * 64 44.7 391 * 644.nab_s 64 44.6 391 S 64 44.6 391 S 644.nab_s 64 44.7 391 S 64 44.7 391 S 649.fotonik3d_s 64 120 76.0 S 64 120 76.0 S 649.fotonik3d_s 64 120 76.1 S 64 120 76.1 S 649.fotonik3d_s 64 120 76.1 * 64 120 76.1 * 654.roms_s 64 77.7 203 S 64 74.0 213 S 654.roms_s 64 77.6 203 S 64 74.0 213 * 654.roms_s 64 77.7 203 * 64 73.9 213 S ================================================================================= 603.bwaves_s 64 143 412 * 64 143 412 * 607.cactuBSSN_s 64 52.2 319 * 64 52.2 319 * 619.lbm_s 64 67.5 77.6 * 64 65.1 80.5 * 621.wrf_s 64 67.3 196 * 64 65.4 202 * 627.cam4_s 64 56.2 158 * 64 55.8 159 * 628.pop2_s 64 138 86.0 * 64 138 86.0 * 638.imagick_s 64 49.6 291 * 64 49.6 291 * 644.nab_s 64 44.7 391 * 64 44.7 391 * 649.fotonik3d_s 64 120 76.1 * 64 120 76.1 * 654.roms_s 64 77.7 203 * 64 74.0 213 * SPECspeed(R)2017_fp_base 185 SPECspeed(R)2017_fp_peak 188 HARDWARE -------- CPU Name: AMD EPYC 7773X Max MHz: 3500 Nominal: 2200 Enabled: 64 cores, 1 chip Orderable: 1 chips Cache L1: 32 KB I + 32 KB D on chip per core L2: 512 KB I+D on chip per core L3: 768 MB I+D on chip per chip, 96 MB shared / 8 cores Other: None Memory: 1 TB (8 x 128 GB 4Rx4 PC4-3200V-L) Storage: 1 x 960 GB M.2 SSD SATA Other: None SOFTWARE -------- OS: SUSE Linux Enterprise Server 15 SP3 (x86_64) 5.3.18-57-default Compiler: C/C++/Fortran: Version 3.2.0 of AOCC Parallel: Yes Firmware: Version 4.2.1.30 released Feb-2022 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: jemalloc: jemalloc memory allocator library v5.1.0 Power Management: BIOS and OS set to prefer performance at the cost of additional power usage Compiler Notes -------------- The AMD64 AOCC Compiler Suite is available at http://developer.amd.com/amd-aocc/ Submit Notes ------------ The config file option 'submit' was used. 'numactl' was used to bind copies to the cores. See the configuration file for details. Operating System Notes ---------------------- 'ulimit -s unlimited' was used to set environment stack size limit 'ulimit -l 2097152' was used to set environment locked pages in memory limit runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu To limit dirty cache to 8% of memory, 'sysctl -w vm.dirty_ratio=8' run as root. To limit swap usage to minimum necessary, 'sysctl -w vm.swappiness=1' run as root. To free node-local memory and avoid remote memory usage, 'sysctl -w vm.zone_reclaim_mode=1' run as root. To clear filesystem caches, 'sync; sysctl -w vm.drop_caches=3' run as root. To disable address space layout randomization (ASLR) to reduce run-to-run variability, 'sysctl -w kernel.randomize_va_space=0' run as root. To enable Transparent Hugepages (THP) for all allocations, 'echo always > /sys/kernel/mm/transparent_hugepage/enabled' and 'echo always > /sys/kernel/mm/transparent_hugepage/defrag' run as root. To enable THP only on request for peak runs of 628.pop2_s: 'echo madvise > /sys/kernel/mm/transparent_hugepage/enabled' run as root. To disable THP for peak runs of 627.cam4_s, 649.fotonik3d_s, and 654.roms_s, 'echo never > /sys/kernel/mm/transparent_hugepage/enabled' run as root. Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: GOMP_CPU_AFFINITY = "0-63" LD_LIBRARY_PATH = "/home/cpu2017/amd_speed_aocc320_milanx_A_lib/lib;/home/cpu2017/amd_spee d_aocc320_milanx_A_lib/lib32:" LIBOMP_NUM_HIDDEN_HELPER_THREADS = "0" MALLOC_CONF = "retain:true" OMP_DYNAMIC = "false" OMP_SCHEDULE = "static" OMP_STACKSIZE = "32G" OMP_THREAD_LIMIT = "64" Environment variables set by runcpu during the 603.bwaves_s peak run: GOMP_CPU_AFFINITY = "0-63" Environment variables set by runcpu during the 619.lbm_s peak run: GOMP_CPU_AFFINITY = "0-63" Environment variables set by runcpu during the 621.wrf_s peak run: GOMP_CPU_AFFINITY = "0-63" Environment variables set by runcpu during the 627.cam4_s peak run: GOMP_CPU_AFFINITY = "0-63" Environment variables set by runcpu during the 654.roms_s peak run: GOMP_CPU_AFFINITY = "0-63" General Notes ------------- Binaries were compiled on a system with 2x AMD EPYC 7742 CPU + 1TiB Memory using openSUSE 15.2 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. jemalloc: configured and built with GCC v4.8.2 in RHEL 7.4 (No options specified) jemalloc 5.1.0 is available here: https://github.com/jemalloc/jemalloc/releases/download/5.1.0/jemalloc-5.1.0.tar.bz2 Platform Notes -------------- SMT Mode set to Disabled NUMA nodes per socket set to NPS1 ACPI SRAT L3 Cache As NUMA Domain set to Enabled DRAM Scrub Time set to Disabled Determinism Slider set to Power L1 Stream HW Prefetcher set to Enabled APBDIS set to 1 Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d running on localhost Sat Feb 26 06:32:45 2022 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : AMD EPYC 7773X 64-Core Processor 1 "physical id"s (chips) 64 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 64 siblings : 64 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 From lscpu from util-linux 2.36.2: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian Address sizes: 48 bits physical, 48 bits virtual CPU(s): 64 On-line CPU(s) list: 0-63 Thread(s) per core: 1 Core(s) per socket: 64 Socket(s): 1 NUMA node(s): 8 Vendor ID: AuthenticAMD CPU family: 25 Model: 1 Model name: AMD EPYC 7773X 64-Core Processor Stepping: 2 Frequency boost: enabled CPU MHz: 2450.687 CPU max MHz: 2200.0000 CPU min MHz: 1500.0000 BogoMIPS: 4391.64 Virtualization: AMD-V L1d cache: 2 MiB L1i cache: 2 MiB L2 cache: 32 MiB L3 cache: 768 MiB NUMA node0 CPU(s): 0-7 NUMA node1 CPU(s): 8-15 NUMA node2 CPU(s): 16-23 NUMA node3 CPU(s): 24-31 NUMA node4 CPU(s): 32-39 NUMA node5 CPU(s): 40-47 NUMA node6 CPU(s): 48-55 NUMA node7 CPU(s): 56-63 Vulnerability Itlb multihit: Not affected Vulnerability L1tf: Not affected Vulnerability Mds: Not affected Vulnerability Meltdown: Not affected Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp Vulnerability Spectre v1: Mitigation; usercopy/swapgs barriers and __user pointer sanitization Vulnerability Spectre v2: Mitigation; Full AMD retpoline, IBPB conditional, IBRS_FW, STIBP disabled, RSB filling Vulnerability Srbds: Not affected Vulnerability Tsx async abort: Not affected Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid aperfmperf pni pclmulqdq monitor ssse3 fma cx16 pcid sse4_1 sse4_2 movbe popcnt aes xsave avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse 3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext perfctr_llc mwaitx cpb cat_l3 cdp_l3 invpcid_single hw_pstate ssbd mba ibrs ibpb stibp vmmcall fsgsbase bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a rdseed adx smap clflushopt clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local clzero irperf xsaveerptr wbnoinvd amd_ppin arat npt lbrv svm_lock nrip_save tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold v_vmsave_vmload vgif umip pku ospke vaes vpclmulqdq rdpid overflow_recov succor smca fsrm From lscpu --cache: NAME ONE-SIZE ALL-SIZE WAYS TYPE LEVEL SETS PHY-LINE COHERENCY-SIZE L1d 32K 2M 8 Data 1 64 1 64 L1i 32K 2M 8 Instruction 1 64 1 64 L2 512K 32M 8 Unified 2 1024 1 64 L3 96M 768M 16 Unified 3 98304 1 64 /proc/cpuinfo cache data cache size : 512 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 8 nodes (0-7) node 0 cpus: 0 1 2 3 4 5 6 7 node 0 size: 128838 MB node 0 free: 128414 MB node 1 cpus: 8 9 10 11 12 13 14 15 node 1 size: 129021 MB node 1 free: 128862 MB node 2 cpus: 16 17 18 19 20 21 22 23 node 2 size: 129021 MB node 2 free: 128873 MB node 3 cpus: 24 25 26 27 28 29 30 31 node 3 size: 129021 MB node 3 free: 128891 MB node 4 cpus: 32 33 34 35 36 37 38 39 node 4 size: 129021 MB node 4 free: 128835 MB node 5 cpus: 40 41 42 43 44 45 46 47 node 5 size: 129021 MB node 5 free: 128862 MB node 6 cpus: 48 49 50 51 52 53 54 55 node 6 size: 128987 MB node 6 free: 128784 MB node 7 cpus: 56 57 58 59 60 61 62 63 node 7 size: 116908 MB node 7 free: 116716 MB node distances: node 0 1 2 3 4 5 6 7 0: 10 11 11 11 11 11 11 11 1: 11 10 11 11 11 11 11 11 2: 11 11 10 11 11 11 11 11 3: 11 11 11 10 11 11 11 11 4: 11 11 11 11 10 11 11 11 5: 11 11 11 11 11 10 11 11 6: 11 11 11 11 11 11 10 11 7: 11 11 11 11 11 11 11 10 From /proc/meminfo MemTotal: 1044318996 kB HugePages_Total: 0 Hugepagesize: 2048 kB /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has performance From /etc/*release* /etc/*version* os-release: NAME="SLES" VERSION="15-SP3" VERSION_ID="15.3" PRETTY_NAME="SUSE Linux Enterprise Server 15 SP3" ID="sles" ID_LIKE="suse" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:15:sp3" uname -a: Linux localhost 5.3.18-57-default #1 SMP Wed Apr 28 10:54:41 UTC 2021 (ba3c2e9) x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-12207 (iTLB Multihit): Not affected CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Full AMD retpoline, IBPB: conditional, IBRS_FW, STIBP: disabled, RSB filling CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected CVE-2019-11135 (TSX Asynchronous Abort): Not affected run-level 3 Feb 26 03:32 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/sda3 xfs 557G 14G 544G 3% / From /sys/devices/virtual/dmi/id Vendor: Cisco Systems Inc Product: UCSC-C225-M6S Serial: WZP252309U3 Additional information from dmidecode 3.2 follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 8x 0xCE00 M386AAG40AM3-CWE 128 GB 4 rank 3200 BIOS: BIOS Vendor: Cisco Systems, Inc. BIOS Version: C225M6.4.2.1.30.0221222139 BIOS Date: 02/21/2022 BIOS Revision: 5.22 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 619.lbm_s(base, peak) 638.imagick_s(base, peak) | 644.nab_s(base, peak) ------------------------------------------------------------------------------ AMD clang version 13.0.0 (CLANG: AOCC_3.2.0-Build#128 2021_11_12) (based on LLVM Mirror.Version.13.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.2.0/bin ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 607.cactuBSSN_s(base, peak) ------------------------------------------------------------------------------ AMD clang version 13.0.0 (CLANG: AOCC_3.2.0-Build#128 2021_11_12) (based on LLVM Mirror.Version.13.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.2.0/bin AMD clang version 13.0.0 (CLANG: AOCC_3.2.0-Build#128 2021_11_12) (based on LLVM Mirror.Version.13.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.2.0/bin AMD clang version 13.0.0 (CLANG: AOCC_3.2.0-Build#128 2021_11_12) (based on LLVM Mirror.Version.13.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.2.0/bin ------------------------------------------------------------------------------ ============================================================================== Fortran | 603.bwaves_s(base, peak) 649.fotonik3d_s(base, peak) | 654.roms_s(base, peak) ------------------------------------------------------------------------------ AMD clang version 13.0.0 (CLANG: AOCC_3.2.0-Build#128 2021_11_12) (based on LLVM Mirror.Version.13.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.2.0/bin ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 621.wrf_s(base, peak) 627.cam4_s(base, peak) | 628.pop2_s(base, peak) ------------------------------------------------------------------------------ AMD clang version 13.0.0 (CLANG: AOCC_3.2.0-Build#128 2021_11_12) (based on LLVM Mirror.Version.13.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.2.0/bin AMD clang version 13.0.0 (CLANG: AOCC_3.2.0-Build#128 2021_11_12) (based on LLVM Mirror.Version.13.0.0) Target: x86_64-unknown-linux-gnu Thread model: posix InstalledDir: /opt/AMD/aocc-compiler-3.2.0/bin ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: clang Fortran benchmarks: flang Benchmarks using both Fortran and C: flang clang Benchmarks using Fortran, C, and C++: clang++ clang flang Base Portability Flags ---------------------- 603.bwaves_s: -DSPEC_LP64 607.cactuBSSN_s: -DSPEC_LP64 619.lbm_s: -DSPEC_LP64 621.wrf_s: -DSPEC_CASE_FLAG -Mbyteswapio -DSPEC_LP64 627.cam4_s: -DSPEC_CASE_FLAG -DSPEC_LP64 628.pop2_s: -DSPEC_CASE_FLAG -Mbyteswapio -DSPEC_LP64 638.imagick_s: -DSPEC_LP64 644.nab_s: -DSPEC_LP64 649.fotonik3d_s: -DSPEC_LP64 654.roms_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -m64 -Wl,-mllvm -Wl,-region-vectorize -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -O3 -march=znver3 -fveclib=AMDLIBM -ffast-math -fopenmp -flto -fstruct-layout=5 -mllvm -unroll-threshold=50 -mllvm -inline-threshold=1000 -fremap-arrays -mllvm -function-specialize -flv-function-specialization -mllvm -enable-gvn-hoist -mllvm -global-vectorize-slp=true -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -z muldefs -DSPEC_OPENMP -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang Fortran benchmarks: -m64 -Wl,-mllvm -Wl,-enable-X86-prefetching -Wl,-mllvm -Wl,-enable-licm-vrp -Wl,-mllvm -Wl,-region-vectorize -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -Hz,1,0x1 -O3 -march=znver3 -fveclib=AMDLIBM -ffast-math -fopenmp -Mrecursive -mllvm -fuse-tile-inner-loop -funroll-loops -mllvm -extra-vectorizer-passes -mllvm -lsr-in-nested-loop -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -mllvm -global-vectorize-slp=true -mllvm -enable-loopinterchange -mllvm -compute-interchange-order -z muldefs -DSPEC_OPENMP -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang Benchmarks using both Fortran and C: -m64 -Wl,-mllvm -Wl,-enable-X86-prefetching -Wl,-mllvm -Wl,-enable-licm-vrp -Wl,-mllvm -Wl,-region-vectorize -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -O3 -march=znver3 -fveclib=AMDLIBM -ffast-math -fopenmp -flto -fstruct-layout=5 -mllvm -unroll-threshold=50 -mllvm -inline-threshold=1000 -fremap-arrays -mllvm -function-specialize -flv-function-specialization -mllvm -enable-gvn-hoist -mllvm -global-vectorize-slp=true -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -Hz,1,0x1 -Mrecursive -mllvm -fuse-tile-inner-loop -funroll-loops -mllvm -extra-vectorizer-passes -mllvm -lsr-in-nested-loop -mllvm -enable-loopinterchange -mllvm -compute-interchange-order -z muldefs -DSPEC_OPENMP -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang Benchmarks using Fortran, C, and C++: -m64 -Wl,-mllvm -Wl,-x86-use-vzeroupper=false -Wl,-mllvm -Wl,-region-vectorize -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -O3 -march=znver3 -fveclib=AMDLIBM -ffast-math -fopenmp -flto -fstruct-layout=5 -mllvm -unroll-threshold=50 -mllvm -inline-threshold=1000 -fremap-arrays -mllvm -function-specialize -flv-function-specialization -mllvm -enable-gvn-hoist -mllvm -global-vectorize-slp=true -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -mllvm -enable-partial-unswitch -mllvm -unroll-threshold=100 -finline-aggressive -mllvm -loop-unswitch-threshold=200000 -mllvm -reroll-loops -mllvm -aggressive-loop-unswitch -mllvm -extra-vectorizer-passes -mllvm -convert-pow-exp-to-int=false -Hz,1,0x1 -Mrecursive -mllvm -fuse-tile-inner-loop -funroll-loops -mllvm -lsr-in-nested-loop -mllvm -enable-loopinterchange -mllvm -compute-interchange-order -z muldefs -DSPEC_OPENMP -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang Base Other Flags ---------------- C benchmarks: -Wno-unused-command-line-argument -Wno-return-type Fortran benchmarks: -Wno-unused-command-line-argument -Wno-return-type Benchmarks using both Fortran and C: -Wno-unused-command-line-argument -Wno-return-type Benchmarks using Fortran, C, and C++: -Wno-unused-command-line-argument -Wno-return-type Peak Compiler Invocation ------------------------ C benchmarks: clang Fortran benchmarks: flang Benchmarks using both Fortran and C: flang clang Benchmarks using Fortran, C, and C++: clang++ clang flang Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 619.lbm_s: -m64 -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -Ofast -march=znver3 -fveclib=AMDLIBM -ffast-math -fopenmp -flto -fstruct-layout=5 -mllvm -unroll-threshold=50 -fremap-arrays -flv-function-specialization -mllvm -inline-threshold=1000 -mllvm -enable-gvn-hoist -mllvm -global-vectorize-slp=true -mllvm -function-specialize -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -DSPEC_OPENMP -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang 638.imagick_s: basepeak = yes 644.nab_s: basepeak = yes Fortran benchmarks: 603.bwaves_s: -m64 -Wl,-mllvm -Wl,-enable-X86-prefetching -Wl,-mllvm -Wl,-enable-licm-vrp -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -Ofast -march=znver3 -fveclib=AMDLIBM -ffast-math -fopenmp -Mrecursive -mllvm -reduce-array-computations=3 -mllvm -global-vectorize-slp=true -mllvm -enable-licm-vrp -DSPEC_OPENMP -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang 649.fotonik3d_s: basepeak = yes 654.roms_s: Same as 603.bwaves_s Benchmarks using both Fortran and C: 621.wrf_s: -m64 -Wl,-mllvm -Wl,-enable-X86-prefetching -Wl,-mllvm -Wl,-enable-licm-vrp -Wl,-mllvm -Wl,-function-specialize -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6 -Wl,-mllvm -Wl,-reduce-array-computations=3 -Ofast -march=znver3 -fveclib=AMDLIBM -ffast-math -fopenmp -flto -fstruct-layout=5 -mllvm -unroll-threshold=50 -fremap-arrays -flv-function-specialization -mllvm -inline-threshold=1000 -mllvm -enable-gvn-hoist -mllvm -global-vectorize-slp=true -mllvm -function-specialize -mllvm -enable-licm-vrp -mllvm -reduce-array-computations=3 -Hz,1,0x1 -Mrecursive -mllvm -fuse-tile-inner-loop -funroll-loops -mllvm -extra-vectorizer-passes -mllvm -lsr-in-nested-loop -mllvm -enable-loopinterchange -mllvm -compute-interchange-order -DSPEC_OPENMP -fopenmp=libomp -lomp -lamdlibm -ljemalloc -lflang 627.cam4_s: Same as 621.wrf_s 628.pop2_s: basepeak = yes Benchmarks using Fortran, C, and C++: 607.cactuBSSN_s: basepeak = yes Peak Other Flags ---------------- C benchmarks: -Wno-unused-command-line-argument -Wno-return-type Fortran benchmarks: -Wno-unused-command-line-argument -Wno-return-type Benchmarks using both Fortran and C: -Wno-unused-command-line-argument -Wno-return-type Benchmarks using Fortran, C, and C++: -Wno-unused-command-line-argument -Wno-return-type The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/aocc320-flags-A1.html http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-AMD-v2-revD.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/aocc320-flags-A1.xml http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-AMD-v2-revD.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2022 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.8 on 2022-02-26 09:32:44-0500. Report generated on 2022-03-21 16:18:48 by CPU2017 text formatter v6255. Originally published on 2022-03-21.