SPEC Seal of Reviewal OMPM2001 Result
Copyright © 1999-2008 Standard Performance Evaluation Corporation
Supermicro Corporation
Supermicro H8DMU
SPECompMpeak2001 = 16707      
SPECompMbase2001 = 16397      
SPEC license # HPG0017 Tested by: Advanced Micro Devices Test site: Austin TX Test date: May-2008 Hardware Avail: Jun-2008 Software Avail: Nov-2007
Benchmark Reference
Time		 Base
Runtime		 Base
Ratio		 Peak
Runtime		 Peak
Ratio		 Graph Scale
310.wupwise_m 6000 291    20602       254    23665       310.wupwise_m base result bar (20602)
310.wupwise_m peak result bar (23665)
312.swim_m 6000 463    12963       399    15043       312.swim_m base result bar (12963)
312.swim_m peak result bar (15043)
314.mgrid_m 7300 451    16174       451    16174       314.mgrid_m base result bar (16174)
314.mgrid_m peak result bar (16174)
316.applu_m 4000 326    12285       326    12285       316.applu_m base result bar (12285)
316.applu_m peak result bar (12285)
318.galgel_m 5100 299    17055       299    17055       318.galgel_m base result bar (17055)
318.galgel_m peak result bar (17055)
320.equake_m 2600 152    17102       156    16699       320.equake_m base result bar (17102)
320.equake_m peak result bar (16699)
324.apsi_m 3400 171    19893       183    18629       324.apsi_m base result bar (19893)
324.apsi_m peak result bar (18629)
326.gafort_m 8700 520    16717       520    16717       326.gafort_m base result bar (16717)
326.gafort_m peak result bar (16717)
328.fma3d_m 4600 449    10239       449    10239       328.fma3d_m base result bar (10239)
328.fma3d_m peak result bar (10239)
330.art_m 6400 137    46626       137    46626       330.art_m base result bar (46626)
330.art_m peak result bar (46626)
332.ammp_m 7000 747    9372      741    9452      332.ammp_m base result bar (9372)
332.ammp_m peak result bar (9452)
SPECompMbase2001 16397        
  SPECompMpeak2001 16707        

Hardware
Hardware Vendor: Supermicro Corporation
Model Name: Supermicro H8DMU
CPU: Quad-Core AMD Opteron(tm) Processor 2347 HE
CPU MHz: 1900
FPU: Integrated
CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip
CPU(s) orderable: 1-2
Primary Cache: 64 KB I + 64 KB D on chip per core
Secondary Cache: 512 KB I+D on chip per core
L3 Cache: 2 MB I+D on chip per chip
Other Cache: None
Memory: 16GB (8x2GB, PC2-5300, CL5 dual-rank)
Disk Subsystem: 300GB 7200 RPM SATA
Other Hardware: None
Software
OpenMP Threads: 8
Parallel: OpenMP
Operating System: SUSE Linux Enterprise Server 10 (x86_64) SP1 2.6.16.46-0.12-smp
Compiler: PathScale Compiler Suite ver. 3.1
File System: Linux/reiserfs
System State: Multi-User
Notes / Tuning Information 
 Extra art Base Flags
   330.art_m (extra): -DINTS_PER_CACHELINE=16 -DDBLS_PER_CACHELINE=8

 Alternate Sources:
   314.mgrid_m (base and peak): intel
 Base tuning:
   C       : pathcc  -gnu3 -mp -Ofast -mcmodel=medium
   Fortran : pathf90 -mp -Ofast -OPT:early_mp=on -mcmodel=medium
   ONESTEP=yes 
 Peak tuning:
    310.wupwise_m: -mp -Ofast -msse3 -LNO:prefetch_ahead=5:prefetch=3 
                   -OPT:unroll_times_max=8:unroll_size=128:IEEE_NaN_Inf=off:ro=3 
                   -IPA:linear=on:plimit=50000:callee_limit=5000 
    312.swim_m: -mp -O3 -OPT:Ofast -m3dnow -mcmodel=medium -LNO:simd=0
    314.mgrid_m: basepeak=yes
    316.applu_m: basepeak=yes
    318.galgel_m: basepeak=yes
    320.equake_m: -gnu3 -Ofast -mp -OPT:alias=disjoint
    324.apsi_m: -mp -O3 -OPT:Ofast -TENV:x=4 -LNO:fusion=2:prefetch=0
    326.gafort_m: basepeak=yes
    328.fma3d_m: basepeak=yes
    330.art_m: basepeak=yes
    332.ammp_m: -gnu3 -mp -Ofast -mcpu=barcelona -mcmodel=medium
                export PSC_OMP_GUIDED_CHUNK_MAX=700
    ONESTEP=yes for all peak tests.
 
 Portablility flags:
  318.galgel_m    : -fixedform -col80
 
 Base and Peak User Environment (bash):
   export OMP_NUM_THREADS=8
   export OMP_DYNAMIC=FALSE
   export PSC_OMP_AFFINITY=TRUE
   export PSC_OMP_STATIC_FAIR=TRUE
   export PSC_OMP_THREAD_SPIN=1000000000
   ulimit -s unlimited
   
 For flag descriptions, see file AMD-Jul2008-psc31_flags.txt
 Default BIOS settings used, except PowerNow! disabled in Bios

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Copyright © 1999-2008 Standard Performance Evaluation Corporation

First published at SPEC.org on 17-Jul-2008

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