SPEC Seal of Reviewal CINT2000 Result
Copyright © 1999-2004 Standard Performance Evaluation Corporation
Hewlett-Packard Company
hp AlphaServer GS320 68/1224
SPECint_rate2000 = 296    
SPECint_rate_base2000 = 275    
SPEC license # 2 Tested by: HPQ - NH Test date: Jul-2002 Hardware Avail: Aug-2002 Software Avail: Dec-2002
Graph Scale Benchmark Base
Copies
Base
Runtime
Base
Ratio
Copies Runtime Ratio
164.gzip base result bar (208)
164.gzip peak result bar (209)
164.gzip 32 250    208     32 249    209    
175.vpr base result bar (283)
175.vpr peak result bar (288)
175.vpr 32 183    283     32 180    288    
176.gcc base result bar (307)
176.gcc peak result bar (329)
176.gcc 32 133    307     32 124    329    
181.mcf base result bar (294)
181.mcf peak result bar (366)
181.mcf 32 227    294     32 182    366    
186.crafty base result bar (362)
186.crafty peak result bar (362)
186.crafty 32 103    362     32 103    362    
197.parser base result bar (204)
197.parser peak result bar (255)
197.parser 32 328    204     32 263    255    
252.eon base result bar (349)
252.eon peak result bar (354)
252.eon 32 138    349     32 136    354    
253.perlbmk base result bar (276)
253.perlbmk peak result bar (296)
253.perlbmk 32 242    276     32 226    296    
254.gap base result bar (122)
254.gap peak result bar (144)
254.gap 32 336    122     32 284    144    
255.vortex base result bar (348)
255.vortex peak result bar (356)
255.vortex 32 203    348     32 198    356    
256.bzip2 base result bar (320)
256.bzip2 peak result bar (349)
256.bzip2 32 174    320     32 160    349    
300.twolf base result bar (366)
300.twolf peak result bar (367)
300.twolf 32 304    366     32 303    367    
  SPECint_rate_base2000 275      
  SPECint_rate2000 296    

Hardware
Hardware Vendor: Hewlett-Packard Company
Model Name: hp AlphaServer GS320 68/1224
CPU: Alpha 21264C
CPU MHz: 1224
FPU: Integrated
CPU(s) enabled: 32 cores, 32 chips, 1 core/chip
CPU(s) orderable: 1 to 32
Parallel: No
Primary Cache: 64KB(I)+64KB(D) on chip
Secondary Cache: 16MB off chip per CPU
L3 Cache: None
Other Cache: None
Memory: 128GB
Disk Subsystem: mfs (Memory File System)
Other Hardware: None
Software
Operating System: Tru64 UNIX V5.1B
Compiler: Compaq C V6.4-215-46B7O
Program Analysis Tools V2.0
Spike V5.2 DTK (1.471.2.2 46B5P)
Compaq C++ V6.3-010-46B2F
File System: mfs
System State: Multi-user
Notes / Tuning Information
 Baseline C  : cc  -arch ev6 -fast +CFB ONESTEP 
          C++: cxx -arch ev6 -O2        ONESTEP 
 
 Peak: 
   All but 252.eon: cc -g3 -arch ev6 ONESTEP
      164.gzip: -fast -O4 -non_shared +CFB 
       175.vpr: -fast -O4 -assume restricted_pointers +CFB 
       176.gcc: -fast -O4 -xtaso_short -all -ldensemalloc -none
                +CFB +IFB 
       181.mcf: -fast -xtaso_short +CFB +IFB +PFB
    186.crafty: same as base
    197.parser: -fast -O4 -xtaso_short -non_shared +CFB
       252.eon: cxx -arch ev6 -O2 -all -ldensemalloc -none 
   253.perlbmk: -fast -non_shared +CFB +IFB 
       254.gap: -fast -O4 -non_shared +CFB +IFB +PFB 
    255.vortex: -fast -non_shared +CFB +IFB
     256.bzip2: -fast -O4 -non_shared +CFB 
     300.twolf: -fast -O4 
                -ldensemalloc -non_shared +CFB +IFB

 Most benchmarks are built using one or more types of 
 profile-driven feedback.  The types used are designated
 by abbreviations in the notes:

 +CFB: Code generation is optimized by the compiler, using 
       feedback from a training run.  These commands are
       done before the first compile (in phase "fdo_pre0"):

            mkdir /tmp/pp
            rm -f /tmp/pp/${baseexe}*

       and these flags are added to the first and second compiles:

            PASS1_CFLAGS = -prof_gen_noopt -prof_dir /tmp/pp
            PASS2_CFLAGS = -prof_use       -prof_dir /tmp/pp
 
      (Peak builds use /tmp/pp above; base builds use /tmp/pb.)

 +IFB: Icache usage is improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These commands
       are used (in phase "fdo_postN"):  

            mv ${baseexe} oldexe
            spike oldexe -feedback oldexe -o ${baseexe}

 +PFB: Prefetches are improved by the post-link-time optimizer 
       Spike, using feedback from a training run.  These
       commands are used (in phase "fdo_post_makeN"):

            rm -f *Counts*
            mv ${baseexe} oldexe
            pixie -stats dstride oldexe 1>pixie.out 2>pixie.err
            mv oldexe.pixie ${baseexe}

       A training run is carried out (in phase "fdo_runN"), and 
       then this command (in phase "fdo_postN"):

            spike oldexe -fb oldexe -stride_prefetch -o ${baseexe}

 When Spike is used for both Icache and Prefetch improvements, 
 only one spike command is actually issued, with the Icache 
 options followed by the Prefetch options.
 
 Portability: gcc: -Dalloca=__builtin_alloca; crafty: -DALPHA
 perlbmk: -DSPEC_CPU2000_DUNIX; vortex: -DSPEC_CPU2000_LP64
 gap: -DSYS_HAS_CALLOC_PROTO -DSYS_IS_BSD -DSYS_HAS_IOCTL_PROTO 
      -DSPEC_CPU2000_LP64
  
 vm:
         vm_bigpg_enabled = 1
         vm_bigpg_thresh = 16
         vm_swap_eager = 0
 
 proc:
         max_per_proc_address_space = 0x40000000000
         max_per_proc_data_size = 0x40000000000
         max_per_proc_stack_size = 0x40000000000
         max_proc_per_user = 2048
         max_threads_per_user = 0
         maxusers = 16384
         per_proc_address_space = 0x40000000000
         per_proc_data_size = 0x40000000000
         per_proc_stack_size = 0x40000000000
 
 submit = runon  $command


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Copyright © 1999-2004 Standard Performance Evaluation Corporation

First published at SPEC.org on 12-Nov-2002

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