CPU2017 Flag Description
Epsylon Sp. z o.o. Sp. Komandytowa eterio 220 RA1 (Intel Xeon Gold 5122, 3.60 GHz)

Copyright © 2016 Intel Corporation. All Rights Reserved.


Base Compiler Invocation

C benchmarks

C++ benchmarks

Fortran benchmarks


Peak Compiler Invocation

C benchmarks

C++ benchmarks

Fortran benchmarks


Base Portability Flags

500.perlbench_r

502.gcc_r

505.mcf_r

520.omnetpp_r

523.xalancbmk_r

525.x264_r

531.deepsjeng_r

541.leela_r

548.exchange2_r

557.xz_r


Peak Portability Flags

500.perlbench_r

502.gcc_r

505.mcf_r

520.omnetpp_r

523.xalancbmk_r

525.x264_r

531.deepsjeng_r

541.leela_r

548.exchange2_r

557.xz_r


Base Optimization Flags

C benchmarks

C++ benchmarks

Fortran benchmarks


Peak Optimization Flags

C benchmarks

500.perlbench_r

502.gcc_r

505.mcf_r

525.x264_r

557.xz_r

C++ benchmarks

520.omnetpp_r

523.xalancbmk_r

531.deepsjeng_r

541.leela_r

Fortran benchmarks


Base Other Flags

C benchmarks

C++ benchmarks

Fortran benchmarks


Peak Other Flags

C benchmarks (except as noted below)

502.gcc_r

C++ benchmarks (except as noted below)

523.xalancbmk_r

Fortran benchmarks


Implicitly Included Flags

This section contains descriptions of flags that were included implicitly by other flags, but which do not have a permanent home at SPEC.


Commands and Options Used to Submit Benchmark Runs

submit= MYMASK=`printf '0x%x' $((1<<$SPECCOPYNUM))`; /usr/bin/taskset $MYMASK $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command, using taskset, is used for Linux64 systems without numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:
submit= numactl --localalloc --physcpubind=$SPECCOPYNUM $command
When running multiple copies of benchmarks, the SPEC config file feature submit is used to cause individual jobs to be bound to specific processors. This specific submit command is used for Linux64 systems with support for numactl.
Here is a brief guide to understanding the specific command which will be found in the config file:

Shell, Environment, and Other Software Settings

numactl --interleave=all "runspec command"
Launching a process with numactl --interleave=all sets the memory interleave policy so that memory will be allocated using round robin on nodes. When memory cannot be allocated on the current interleave target fall back to other nodes.
KMP_STACKSIZE
Specify stack size to be allocated for each thread.
KMP_AFFINITY
Syntax: KMP_AFFINITY=[<modifier>,...]<type>[,<permute>][,<offset>]
The value for the environment variable KMP_AFFINITY affects how the threads from an auto-parallelized program are scheduled across processors.
It applies to binaries built with -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows).
modifier:
    granularity=fine Causes each OpenMP thread to be bound to a single thread context.
type:
    compact Specifying compact assigns the OpenMP thread <n>+1 to a free thread context as close as possible to the thread context where the <n> OpenMP thread was placed.
    scatter Specifying scatter distributes the threads as evenly as possible across the entire system.
permute: The permute specifier is an integer value controls which levels are most significant when sorting the machine topology map. A value for permute forces the mappings to make the specified number of most significant levels of the sort the least significant, and it inverts the order of significance.
offset: The offset specifier indicates the starting position for thread assignment.

Please see the Thread Affinity Interface article in the Intel Composer XE Documentation for more details.

Example: KMP_AFFINITY=granularity=fine,scatter
Specifying granularity=fine selects the finest granularity level and causes each OpenMP or auto-par thread to be bound to a single thread context.
This ensures that there is only one thread per core on cores supporting HyperThreading Technology
Specifying scatter distributes the threads as evenly as possible across the entire system.
Hence a combination of these two options, will spread the threads evenly across sockets, with one thread per physical core.

Example: KMP_AFFINITY=compact,1,0
Specifying compact will assign the n+1 thread to a free thread context as close as possible to thread n.
A default granularity=core is implied if no granularity is explicitly specified.
Specifying 1,0 sets permute and offset values of the thread assignment.
With a permute value of 1, thread n+1 is assigned to a consecutive core. With an offset of 0, the process's first thread 0 will be assigned to thread 0.
The same behavior is exhibited in a multisocket system.
OMP_NUM_THREADS
Sets the maximum number of threads to use for OpenMP* parallel regions if no other value is specified in the application. This environment variable applies to both -qopenmp and -parallel (Linux and Mac OS X) or /Qopenmp and /Qparallel (Windows). Example syntax on a Linux system with 8 cores: export OMP_NUM_THREADS=8
Set stack size to unlimited
The command "ulimit -s unlimited" is used to set the stack size limit to unlimited.
Free the file system page cache
The command "echo 1> /proc/sys/vm/drop_caches" is used to free up the filesystem page cache.

Red Hat Specific features

Transparent Huge Pages
On RedHat EL 6 and later, Transparent Hugepages increase the memory page size from 4 kilobytes to 2 megabytes. Transparent Hugepages provide significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead.
Hugepages are used by default unless the /sys/kernel/mm/redhat_transparent_hugepage/enabled field is changed from its RedHat EL6 default of 'always'.

Firmware / BIOS / Microcode Settings

Intel(R) Hyper-Threading Tech:
Intel(R) Hyper-Threading Technology allows multithreaded software applications to execute threads in parallel within each processor.
The options are [Disabled] and [Enabled].
Users should set this option as [Enabled] for performing CPU2017 INT/FP Rate benchmark.
Users should set this option as [Disabled] for performing CPU2017 INT/FP Speed benchmark.
CPU Power and Performance Policy:
Allows the user to set an overall power and performance policy for the system.
[Balanced Performance] - Weights optimization toward performance, while conserving energy.
[Performance] - Optimization is strongly toward pweformance, even at the expense of energy efficiency.
[Balanced Power] - Weights optimization toward energy conservation, with good performance.
[Power] - Optimization is stronglytoward energy efficiency, even at the expense of performance.
Users should set this option as [Performance] for performing application benchmarking.
Intel(R) Turbo Boost Technology:
The options are [Disabled] and [Enabled].
This option Allows the processor to automatically increrase its frequency if it is running below power, temperature, and current specifications.
Users should set this option as [Enabled] for performing application benchmarking.
C1E:
The options are [Disabled] and [Enabled].
When enabled, C1E halt state invoked by the operating system's idle process turns down the entire CPU's clock frequency and voltage and cut a CPU's power consumption and heat production.
Users should set this option as [Disabled] for performing application benchmarking.
Processor C6:
The options are [Disabled] and [Enabled].
Enabling this option allows the processor to send the C6 report to the Operating system.
Users should set this option as [Disabled] for performing application benchmarking.
IMC Interleaving:
This BIOS option controls the interleaving between the Integrated Memory Controllers (IMCs).
The options are [Auto], [1-way Interleave] and [2-way Interleave].
There are two Integrated Memory Controllers in Skylake CPUs.
If IMC Interleaving is set to 2-way, addresses will be interleaved between the two IMCs. 
If IMC Interleaving is set to 1-way, there will be no interleaving.  
If Sub_NUMA Cluster is disabled, IMC Interleaving should be set to 2-way.  
If Sub_NUMA Cluster is enabled, IMC Interleaving should be set to 1-way. 
Sub_NUMA Cluster:
This BIOS option provides similar localization benefits as Cluster-On-Die (COD), without some of COD downsides. 
Sub_NUMA Cluster breaks up the LLC into two disjoint clusters based on address range, with each cluster bound to a subset of the memory controllers in the system. 
Sub_NUMA Cluster improves average latency to the LLC (last level cache) and memory. 
For a multi-socketed system, all clusters are mapped to unique NUMA domains. 
IMC Interleaving must be set to the correct value to correspond with Sub_NUMA Cluster enable/disable. 
The options are [Disabled] and [Enabled].
Set FAN Profile:
[Performance] - Fan control provides primary system cooling before attempting to throttle memory.
[Acoustic] - The system will favor using throttling of memory over boosting fans to cool the system if thermal thresholds are met.
Users should set this option as [Performance] for performing application benchmarking.
Patrol Scrub:
The options are [Disabled] and [Enabled].
When enabled, performs periodic checks on memory cells and proactively walks through populated memory space, to seek and correct soft ECC errors.
Users should set this option as [Disabled] for performing application benchmarking.

Flag description origin markings:

[user] Indicates that the flag description came from the user flags file.
[suite] Indicates that the flag description came from the suite-wide flags file.
[benchmark] Indicates that the flag description came from a per-benchmark flags file.

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-10-19.html,
http://www.spec.org/cpu2017/flags/Epsylon-Platform-Flags-RevA-Feb-2018-For-Intel-Platform.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-10-19.xml,
http://www.spec.org/cpu2017/flags/Epsylon-Platform-Flags-RevA-Feb-2018-For-Intel-Platform.xml.


For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2017-2018 Standard Performance Evaluation Corporation
Tested with SPEC CPU2017 v1.0.2.
Report generated on 2018-10-31 17:11:00 by SPEC CPU2017 flags formatter v5178.