SPEC® CPU2017 Integer Rate Result

Copyright 2017-2018 Standard Performance Evaluation Corporation

Supermicro

SuperStorage 5049P-E1CR45H (X11SPL-F , Intel Xeon
Gold 5120)

SPECrate2017_int_base = 68.50

SPECrate2017_int_peak = 72.70

CPU2017 License: 001176 Test Date: Nov-2018
Test Sponsor: Supermicro Hardware Availability: Jul-2017
Tested by: Supermicro Software Availability: Mar-2018

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 5120
  Max MHz.: 3200
  Nominal: 2200
Enabled: 14 cores, 1 chip, 2 threads/core
Orderable: 1 chip
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 1 MB I+D on chip per core
  L3: 19.25 MB I+D on chip per chip
  Other: None
Memory: 192 GB (6 x 32 GB 2Rx4 PC4-2666V-R,
running at 2400)
Storage: 1 x 200 GB SATA III SSD
Other: None
Software
OS: SUSE Linux Enterprise Server 12 SP3 (x86_64)
Kernel 4.4.114-94.11-default
Compiler: C/C++: Version 18.0.2.199 of Intel C/C++
Compiler for Linux;
Fortran: Version 18.0.2.199 of Intel Fortran
Compiler for Linux
Parallel: No
Firmware: Supermicro BIOS version 2.1 released Jun-2018
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 32/64-bit
Other: jemalloc memory allocator library V5.0.1

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate2017_int_base 68.50
SPECrate2017_int_peak 72.70
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
500.perlbench_r 28 833 53.5 831 53.6 832 53.6 28 697 64.0 700 63.7 701 63.6
502.gcc_r 28 647 61.3 655 60.5 657 60.4 28 551 71.9 551 72.0 551 71.9
505.mcf_r 28 510 88.7 530 85.4 529 85.5 28 510 88.7 530 85.4 529 85.5
520.omnetpp_r 28 807 45.5 809 45.4 805 45.6 28 807 45.5 809 45.4 805 45.6
523.xalancbmk_r 28 424 69.7 424 69.8 425 69.6 28 350 84.6 348 84.9 348 85.0
525.x264_r 28 368 1330 371 1320 370 1330 28 363 1350 357 1370 355 1380
531.deepsjeng_r 28 532 60.3 539 59.6 540 59.4 28 532 60.3 539 59.6 540 59.4
541.leela_r 28 831 55.8 829 55.9 828 56.0 28 821 56.5 815 56.9 816 56.8
548.exchange2_r 28 576 1270 575 1280 576 1270 28 576 1270 575 1280 576 1270
557.xz_r 28 605 50.0 657 46.0 658 46.0 28 605 50.0 657 46.0 658 46.0

Submit Notes

 The taskset mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate taskset commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64"

 Binaries compiled on a system with 1x Intel Core i7-6700K CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.5
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches

 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.
 jemalloc, a general purpose malloc implementation
 built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5
 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases

Platform Notes

 BIOS Settings:
 LLC prefetch = Enable
 Power Technology = Custom
 Power Performance Tuning = BIOS Controls EPB
 ENERGY_PERF_BIAS_CFG mode = Maximum Performance
 LLC dead line alloc = Disable
 Patrol Scrub = Disable
 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9
 running on linux-52ma Wed Nov 14 14:44:52 2018

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 5120 CPU @ 2.20GHz
       1  "physical id"s (chips)
       28 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 14
       siblings  : 28
       physical 0: cores 0 1 2 3 4 5 6 8 9 10 11 12 13 14

 From lscpu:
      Architecture:          x86_64
      CPU op-mode(s):        32-bit, 64-bit
      Byte Order:            Little Endian
      CPU(s):                28
      On-line CPU(s) list:   0-27
      Thread(s) per core:    2
      Core(s) per socket:    14
      Socket(s):             1
      NUMA node(s):          1
      Vendor ID:             GenuineIntel
      CPU family:            6
      Model:                 85
      Model name:            Intel(R) Xeon(R) Gold 5120 CPU @ 2.20GHz
      Stepping:              4
      CPU MHz:               2200.002
      BogoMIPS:              4400.00
      Virtualization:        VT-x
      L1d cache:             32K
      L1i cache:             32K
      L2 cache:              1024K
      L3 cache:              19712K
      NUMA node0 CPU(s):     0-27
      Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
      aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
      fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes
      xsave avx f16c rdrand lahf_lm abm 3dnowprefetch ida arat epb invpcid_single pln pts
      dtherm hwp_epp intel_pt rsb_ctxsw spec_ctrl retpoline kaiser tpr_shadow vnmi
      flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm
      cqm mpx avx512f avx512dq rdseed adx smap clflushopt clwb avx512cd avx512bw avx512vl
      xsaveopt xsavec xgetbv1 cqm_llc cqm_occup_llc pku ospke

 /proc/cpuinfo cache data
    cache size : 19712 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 1 nodes (0)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
   node 0 size: 192074 MB
   node 0 free: 191354 MB
   node distances:
   node   0
     0:  10

 From /proc/meminfo
    MemTotal:       196684452 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 3
       # This file is deprecated and will be removed in a future service pack or release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP3"
       VERSION_ID="12.3"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP3"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp3"

 uname -a:
    Linux linux-52ma 4.4.114-94.11-default #1 SMP Thu Feb 1 19:28:26 UTC 2018 (4309ff9)
    x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2017-5754 (Meltdown):          Mitigation: PTI
 CVE-2017-5753 (Spectre variant 1): Mitigation: Barriers
 CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS+IBPB

 run-level 3 Nov 14 14:29

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda4      xfs   145G   50G   95G  35% /home

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   BIOS American Megatrends Inc. 2.1 06/15/2018
   Memory:
    2x NO DIMM NO DIMM
    6x Samsung M393A4K40BB2-CTD 32 GB 2 rank 2666, configured at 2400

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
 CC  500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) 525.x264_r(base)
      557.xz_r(base)
------------------------------------------------------------------------------
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CC   500.perlbench_r(peak) 502.gcc_r(peak) 505.mcf_r(peak) 525.x264_r(peak)
     557.xz_r(peak)
------------------------------------------------------------------------------
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base)
      541.leela_r(base)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak)
     541.leela_r(peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  548.exchange2_r(base)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
FC   548.exchange2_r(peak)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Base Portability Flags

500.perlbench_r:  -DSPEC_LP64   -DSPEC_LINUX_X64 
502.gcc_r:  -DSPEC_LP64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -DSPEC_LP64   -DSPEC_LINUX 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

C++ benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Fortran benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m64 -std=c11 
502.gcc_r:  icc -m32 -std=c11 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin 

C++ benchmarks (except as noted below):

 icpc -m64 
523.xalancbmk_r:  icpc -m32 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin 

Fortran benchmarks:

 ifort -m64 

Peak Portability Flags

500.perlbench_r:  -DSPEC_LP64   -DSPEC_LINUX_X64 
502.gcc_r:  -D_FILE_OFFSET_BITS=64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -D_FILE_OFFSET_BITS=64   -DSPEC_LINUX 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Peak Optimization Flags

C benchmarks:

500.perlbench_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -fno-strict-overflow   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
502.gcc_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-32/lib   -ljemalloc 
505.mcf_r:  basepeak = yes 
525.x264_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -fno-alias   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
557.xz_r:  basepeak = yes 

C++ benchmarks:

520.omnetpp_r:  basepeak = yes 
523.xalancbmk_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-32/lib   -ljemalloc 
531.deepsjeng_r:  basepeak = yes 
541.leela_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Fortran benchmarks:

548.exchange2_r:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html,
http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-SKL-revD.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml,
http://www.spec.org/cpu2017/flags/Supermicro-Platform-Settings-V1.2-SKL-revD.xml.