SPEC® CPU2017 Integer Rate Result

Copyright 2017-2019 Standard Performance Evaluation Corporation

NEC Corporation

Express5800/T110j-S (Intel Xeon E-2146G)

SPECrate2017_int_base = 41.20

SPECrate2017_int_peak = 44.30

CPU2017 License: 9006 Test Date: Dec-2018
Test Sponsor: NEC Corporation Hardware Availability: Dec-2018
Tested by: NEC Corporation Software Availability: Aug-2018

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon E-2146G
  Max MHz.: 4500
  Nominal: 3500
Enabled: 6 cores, 1 chip, 2 threads/core
Orderable: 1 chip
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 256 KB I+D on chip per core
  L3: 12 MB I+D on chip per chip
  Other: None
Memory: 64 GB (4 x 16 GB 2Rx8 PC4-2666V-E)
Storage: 1 x 1 TB SATA, 7200 RPM
Other: None
Software
OS: Red Hat Enterprise Linux Server release 7.5
(Maipo)
Kernel 3.10.0-862.11.6.el7.x86_64
Compiler: C/C++: Version 18.0.2.199 of Intel C/C++
Compiler for Linux;
Fortran: Version 18.0.2.199 of Intel Fortran
Compiler for Linux
Parallel: No
Firmware: NEC BIOS Version F07 10/31/2018 released Dec-2018
File System: ext4
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 32/64-bit
Other: jemalloc memory allocator V5.0.1

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate2017_int_base 41.20
SPECrate2017_int_peak 44.30
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
500.perlbench_r 12 518 36.8 525 36.4 524 36.4 12 435 43.9 439 43.5 440 43.5
502.gcc_r 12 475 35.8 474 35.9 477 35.6 12 376 45.2 375 45.3 375 45.3
505.mcf_r 12 420 46.2 433 44.8 428 45.3 12 420 46.2 433 44.8 428 45.3
520.omnetpp_r 12 809 19.5 808 19.5 825 19.1 12 809 19.5 808 19.5 825 19.1
523.xalancbmk_r 12 328 38.6 332 38.2 338 37.5 12 257 49.4 257 49.3 258 49.1
525.x264_r 12 221 95.1 222 94.7 221 94.9 12 212 98.9 209 1010 210 99.8
531.deepsjeng_r 12 330 41.7 338 40.6 342 40.3 12 330 41.7 338 40.6 342 40.3
541.leela_r 12 538 37.0 538 36.9 532 37.4 12 538 37.0 538 36.9 532 37.4
548.exchange2_r 12 358 87.8 356 88.3 357 88.2 12 358 87.8 356 88.3 357 88.2
557.xz_r 12 472 27.5 503 25.8 505 25.6 12 472 27.5 503 25.8 505 25.6

Submit Notes

 The taskset mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate taskset commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"
 IRQ balance service was stopped using "systemctl stop irqbalance.service"

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017/lib/ia32:/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-32:/home/cpu2017/je5.0.1-64"

 Binaries compiled on a system with 1x Intel Core i7-6700K CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.5
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3 >       /proc/sys/vm/drop_caches

 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
 is mitigated in the system as tested and documented.
 Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
 is mitigated in the system as tested and documented.

 jemalloc, a general purpose malloc implementation
 built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5
 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases

Platform Notes

 BIOS Settings:
  VT-x: Disabled
  Energy Efficient P-state: Disabled
  Energy Efficient Turbo: Disabled
 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9
 running on t110js Sun Dec 23 15:51:15 2018

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) E-2146G CPU @ 3.50GHz
       1  "physical id"s (chips)
       12 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 6
       siblings  : 12
       physical 0: cores 0 1 2 3 4 5

 From lscpu:
      Architecture:          x86_64
      CPU op-mode(s):        32-bit, 64-bit
      Byte Order:            Little Endian
      CPU(s):                12
      On-line CPU(s) list:   0-11
      Thread(s) per core:    2
      Core(s) per socket:    6
      Socket(s):             1
      NUMA node(s):          1
      Vendor ID:             GenuineIntel
      CPU family:            6
      Model:                 158
      Model name:            Intel(R) Xeon(R) E-2146G CPU @ 3.50GHz
      Stepping:              10
      CPU MHz:               4304.290
      CPU max MHz:           4500.0000
      CPU min MHz:           800.0000
      BogoMIPS:              7008.00
      Virtualization:        VT-x
      L1d cache:             32K
      L1i cache:             32K
      L2 cache:              256K
      L3 cache:              12288K
      NUMA node0 CPU(s):     0-11
      Flags:                 fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc
      aperfmperf eagerfpu pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg
      fma cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes
      xsave avx f16c rdrand lahf_lm abm 3dnowprefetch intel_pt ssbd ibrs ibpb stibp
      tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2
      erms invpcid rtm mpx rdseed adx smap clflushopt xsaveopt xsavec xgetbv1 dtherm ida
      arat pln pts hwp hwp_notify hwp_act_window hwp_epp spec_ctrl intel_stibp flush_l1d

 /proc/cpuinfo cache data
    cache size : 12288 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 1 nodes (0)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11
   node 0 size: 65455 MB
   node 0 free: 63564 MB
   node distances:
   node   0
     0:  10

 From /proc/meminfo
    MemTotal:       65894340 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    os-release:
       NAME="Red Hat Enterprise Linux Server"
       VERSION="7.5 (Maipo)"
       ID="rhel"
       ID_LIKE="fedora"
       VARIANT="Server"
       VARIANT_ID="server"
       VERSION_ID="7.5"
       PRETTY_NAME="Red Hat Enterprise Linux Server 7.5 (Maipo)"
    redhat-release: Red Hat Enterprise Linux Server release 7.5 (Maipo)
    system-release: Red Hat Enterprise Linux Server release 7.5 (Maipo)
    system-release-cpe: cpe:/o:redhat:enterprise_linux:7.5:ga:server

 uname -a:
    Linux t110js 3.10.0-862.11.6.el7.x86_64 #1 SMP Fri Aug 10 16:55:11 UTC 2018 x86_64
    x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2017-5754 (Meltdown):          Mitigation: PTI
 CVE-2017-5753 (Spectre variant 1): Mitigation: Load fences, __user pointer sanitization
 CVE-2017-5715 (Spectre variant 2): Mitigation: IBRS (kernel)

 run-level 3 Dec 23 15:45

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda3      ext4  909G  118G  745G  14% /

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   BIOS American Megatrends Inc. F07 10/31/2018
   Memory:
    4x Samsung M391A2K43BB1-CTD 16 GB 2 rank 2667

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
 CC  500.perlbench_r(base) 502.gcc_r(base) 505.mcf_r(base) 525.x264_r(base)
      557.xz_r(base)
------------------------------------------------------------------------------
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CC   500.perlbench_r(peak) 502.gcc_r(peak) 505.mcf_r(peak) 525.x264_r(peak)
     557.xz_r(peak)
------------------------------------------------------------------------------
icc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 CXXC 520.omnetpp_r(base) 523.xalancbmk_r(base) 531.deepsjeng_r(base)
      541.leela_r(base)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
CXXC 520.omnetpp_r(peak) 523.xalancbmk_r(peak) 531.deepsjeng_r(peak)
     541.leela_r(peak)
------------------------------------------------------------------------------
icpc (ICC) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
 FC  548.exchange2_r(base)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
FC   548.exchange2_r(peak)
------------------------------------------------------------------------------
ifort (IFORT) 18.0.2 20180210
Copyright (C) 1985-2018 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Base Portability Flags

500.perlbench_r:  -DSPEC_LP64   -DSPEC_LINUX_X64 
502.gcc_r:  -DSPEC_LP64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -DSPEC_LP64   -DSPEC_LINUX 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

C++ benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Fortran benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs   -L/usr/local/je5.0.1-64/lib   -ljemalloc 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m64 -std=c11 
502.gcc_r:  icc -m32 -std=c11 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin 

C++ benchmarks (except as noted below):

 icpc -m64 
523.xalancbmk_r:  icpc -m32 -L/home/prasadj/specdev/IC18u2_Internal/lin_18_0_20180210/compiler/lib/ia32_lin 

Fortran benchmarks:

 ifort -m64 

Peak Portability Flags

500.perlbench_r:  -DSPEC_LP64   -DSPEC_LINUX_X64 
502.gcc_r:  -D_FILE_OFFSET_BITS=64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -D_FILE_OFFSET_BITS=64   -DSPEC_LINUX 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Peak Optimization Flags

C benchmarks:

500.perlbench_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -fno-strict-overflow   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
502.gcc_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-32/lib   -ljemalloc 
505.mcf_r:  basepeak = yes 
525.x264_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -fno-alias   -L/usr/local/je5.0.1-64/lib   -ljemalloc 
557.xz_r:  basepeak = yes 

C++ benchmarks:

520.omnetpp_r:  basepeak = yes 
523.xalancbmk_r:  -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX2   -O3   -no-prec-div   -qopt-mem-layout-trans=3   -L/usr/local/je5.0.1-32/lib   -ljemalloc 
531.deepsjeng_r:  basepeak = yes 
541.leela_r:  basepeak = yes 

Fortran benchmarks:

548.exchange2_r:  basepeak = yes 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.html,
http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-T110j-RevB.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic18.0-official-linux64.2017-12-21.xml,
http://www.spec.org/cpu2017/flags/NEC-Platform-Settings-T110j-RevB.xml.