SPEC CPU®2017 Floating Point Rate Result

Copyright 2017-2021 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS X210c M6 (Intel Xeon Gold 6342,
2.80GHz)

SPECrate®2017_fp_base = 38000

SPECrate®2017_fp_peak = Not Run

CPU2017 License: 9019 Test Date: Dec-2021
Test Sponsor: Cisco Systems Hardware Availability: Sep-2021
Tested by: Cisco Systems Software Availability: Sep-2021

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 6342
  Max MHz: 3500
  Nominal: 2800
Enabled: 48 cores, 2 chips, 2 threads/core
Orderable: 1,2 Chips
Cache L1: 32 KB I + 48 KB D on chip per core
  L2: 1.25 MB I+D on chip per core
  L3: 36 MB I+D on chip per chip
  Other: None
Memory: 2 TB (32 x 64 GB 2Rx4 PC4-3200AA-R)
Storage: 1 x 240 GB M.2 SSD SATA
Other: None
Software
OS: SUSE Linux Enterprise Server 15 SP3
5.3.18-57-default
Compiler: C/C++: Version 2021.4.0 of Intel oneAPI DPC++/C++
Compiler Build 20210924 for Linux;
Fortran: Version 2021.4.0 of Intel Fortran
Compiler
Classic Build 20210910 for Linux;
Parallel: No
Firmware: Version 5.0.1d released Aug-2021
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: Not Applicable
Other: jemalloc memory allocator V5.0.1
Power Management: BIOS and OS set to prefer performance at the cost
of additional power usage

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate®2017_fp_base 38000
SPECrate®2017_fp_peak Not Run
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
503.bwaves_r 96 1347 715 1346 715 1349 714
507.cactuBSSN_r 96 235 517 235 517 237 513
508.namd_r 96 311 294 311 294 310 294
510.parest_r 96 1270 198 1272 198 1267 198
511.povray_r 96 513 437 515 436 514 437
519.lbm_r 96 501 202 518 195 524 193
521.wrf_r 96 653 329 646 333 645 334
526.blender_r 96 313 467 314 466 313 467
527.cam4_r 96 436 385 438 384 438 384
538.imagick_r 96 208 1150 208 1150 208 1150
544.nab_r 96 202 801 201 803 202 800
549.fotonik3d_r 96 1667 224 1667 224 1669 224
554.roms_r 96 1000 153 1002 152 1002 152

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Environment Variables Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/je5.0.1-64"
MALLOC_CONF = "retain:true"

General Notes

 Binaries compiled on a system with 1x Intel Core i9-7940X CPU + 64GB RAM
 memory using openSUSE Leap 15.2
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches
 runcpu command invoked through numactl i.e.:
 numactl --interleave=all runcpu <etc>
NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.
 jemalloc, a general purpose malloc implementation
 built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5
 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases

Platform Notes

BIOS Settings:
Adjacent Cache Line Prefetcher set to Disabled
DCU Streamer Prefetch set to Disabled
Sub NUMA Clustering set to Enabled
LLC Dead Line set to Disabled
Memory Refresh Rate set to 1x Refresh
ADDDC Sparing set to Disabled
Patrol Scrub set to Disabled

 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d
 running on perf-blade1 Wed Dec  1 23:38:56 2021

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6342 CPU @ 2.80GHz
       2  "physical id"s (chips)
       96 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 24
       siblings  : 48
       physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23
       physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23

 From lscpu from util-linux 2.36.2:
      Architecture:                    x86_64
      CPU op-mode(s):                  32-bit, 64-bit
      Byte Order:                      Little Endian
      Address sizes:                   46 bits physical, 57 bits virtual
      CPU(s):                          96
      On-line CPU(s) list:             0-95
      Thread(s) per core:              2
      Core(s) per socket:              24
      Socket(s):                       2
      NUMA node(s):                    4
      Vendor ID:                       GenuineIntel
      CPU family:                      6
      Model:                           106
      Model name:                      Intel(R) Xeon(R) Gold 6342 CPU @ 2.80GHz
      Stepping:                        6
      CPU MHz:                         3153.583
      CPU max MHz:                     3500.0000
      CPU min MHz:                     800.0000
      BogoMIPS:                        5600.00
      Virtualization:                  VT-x
      L1d cache:                       2.3 MiB
      L1i cache:                       1.5 MiB
      L2 cache:                        60 MiB
      L3 cache:                        72 MiB
      NUMA node0 CPU(s):               0-11,48-59
      NUMA node1 CPU(s):               12-23,60-71
      NUMA node2 CPU(s):               24-35,72-83
      NUMA node3 CPU(s):               36-47,84-95
      Vulnerability Itlb multihit:     Not affected
      Vulnerability L1tf:              Not affected
      Vulnerability Mds:               Not affected
      Vulnerability Meltdown:          Not affected
      Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via
      prctl and seccomp
      Vulnerability Spectre v1:        Mitigation; usercopy/swapgs barriers and __user
      pointer sanitization
      Vulnerability Spectre v2:        Mitigation; Enhanced IBRS, IBPB conditional, RSB
      filling
      Vulnerability Srbds:             Not affected
      Vulnerability Tsx async abort:   Not affected
      Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
      pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx
      pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology
      nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2
      ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt
      tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault
      epb cat_l3 invpcid_single ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi
      flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms
      invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb
      intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc
      cqm_occup_llc cqm_mbm_total cqm_mbm_local split_lock_detect wbnoinvd dtherm ida arat
      pln pts hwp hwp_act_window hwp_epp hwp_pkg_req avx512vbmi umip pku ospke
      avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq
      la57 rdpid fsrm md_clear pconfig flush_l1d arch_capabilities

 From lscpu --cache:
      NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL  SETS PHY-LINE COHERENCY-SIZE
      L1d       48K     2.3M   12 Data            1    64        1             64
      L1i       32K     1.5M    8 Instruction     1    64        1             64
      L2       1.3M      60M   20 Unified         2  1024        1             64
      L3        36M      72M   12 Unified         3 49152        1             64

 /proc/cpuinfo cache data
    cache size : 36864 KB

 From numactl --hardware
 WARNING: a numactl 'node' might or might not correspond to a physical chip.
   available: 4 nodes (0-3)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 48 49 50 51 52 53 54 55 56 57 58 59
   node 0 size: 515684 MB
   node 0 free: 515034 MB
   node 1 cpus: 12 13 14 15 16 17 18 19 20 21 22 23 60 61 62 63 64 65 66 67 68 69 70 71
   node 1 size: 516089 MB
   node 1 free: 515470 MB
   node 2 cpus: 24 25 26 27 28 29 30 31 32 33 34 35 72 73 74 75 76 77 78 79 80 81 82 83
   node 2 size: 516089 MB
   node 2 free: 515343 MB
   node 3 cpus: 36 37 38 39 40 41 42 43 44 45 46 47 84 85 86 87 88 89 90 91 92 93 94 95
   node 3 size: 516052 MB
   node 3 free: 515466 MB
   node distances:
   node   0   1   2   3
     0:  10  11  20  20
     1:  11  10  20  20
     2:  20  20  10  11
     3:  20  20  11  10

 From /proc/meminfo
    MemTotal:       2113450040 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has
    performance

 From /etc/*release* /etc/*version*
    os-release:
       NAME="SLES"
       VERSION="15-SP3"
       VERSION_ID="15.3"
       PRETTY_NAME="SUSE Linux Enterprise Server 15 SP3"
       ID="sles"
       ID_LIKE="suse"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:15:sp3"

 uname -a:
    Linux perf-blade1 5.3.18-57-default #1 SMP Wed Apr 28 10:54:41 UTC 2021 (ba3c2e9)
    x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-12207 (iTLB Multihit):                        Not affected
 CVE-2018-3620 (L1 Terminal Fault):                     Not affected
 Microarchitectural Data Sampling:                      Not affected
 CVE-2017-5754 (Meltdown):                              Not affected
 CVE-2018-3639 (Speculative Store Bypass):              Mitigation: Speculative Store
                                                        Bypass disabled via prctl and
                                                        seccomp
 CVE-2017-5753 (Spectre variant 1):                     Mitigation: usercopy/swapgs
                                                        barriers and __user pointer
                                                        sanitization
 CVE-2017-5715 (Spectre variant 2):                     Mitigation: Enhanced IBRS, IBPB:
                                                        conditional, RSB filling
 CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected
 CVE-2019-11135 (TSX Asynchronous Abort):               Not affected

 run-level 3 Dec 1 20:13

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda3      xfs   181G   54G  128G  30% /home

 From /sys/devices/virtual/dmi/id
     Vendor:         Cisco Systems Inc
     Product:        UCSX-210C-M6
     Serial:         FCH25057AMV

 Additional information from dmidecode 3.2 follows.  WARNING: Use caution when you
 interpret this section. The 'dmidecode' program reads system data which is "intended to
 allow hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     32x 0xCE00 M393A8G40AB2-CWE 64 GB 2 rank 3200

 BIOS:
    BIOS Vendor:       Cisco Systems, Inc.
    BIOS Version:      X210M6.5.0.1d.0.0816211754
    BIOS Date:         08/16/2021
    BIOS Revision:     5.22

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C               | 519.lbm_r(base) 538.imagick_r(base) 544.nab_r(base)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.4.0 Build 20210924
Copyright (C) 1985-2021 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++             | 508.namd_r(base) 510.parest_r(base)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.4.0 Build 20210924
Copyright (C) 1985-2021 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base) 526.blender_r(base)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.4.0 Build 20210924
Copyright (C) 1985-2021 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.4.0 Build 20210924
Copyright (C) 1985-2021 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base)
------------------------------------------------------------------------------
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.4.0 Build 20210924
Copyright (C) 1985-2021 Intel Corporation. All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.4.0 Build 20210924
Copyright (C) 1985-2021 Intel Corporation. All rights reserved.
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.4.0 Build 20210910_000000
Copyright (C) 1985-2021 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 503.bwaves_r(base) 549.fotonik3d_r(base) 554.roms_r(base)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.4.0 Build 20210910_000000
Copyright (C) 1985-2021 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base) 527.cam4_r(base)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.4.0 Build 20210910_000000
Copyright (C) 1985-2021 Intel Corporation.  All rights reserved.
Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64,
  Version 2021.4.0 Build 20210924
Copyright (C) 1985-2021 Intel Corporation. All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icx 

C++ benchmarks:

 icpx 

Fortran benchmarks:

 ifort 

Benchmarks using both Fortran and C:

 ifort   icx 

Benchmarks using both C and C++:

 icpx   icx 

Benchmarks using Fortran, C, and C++:

 icpx   icx   ifort 

Base Portability Flags

503.bwaves_r:  -DSPEC_LP64 
507.cactuBSSN_r:  -DSPEC_LP64 
508.namd_r:  -DSPEC_LP64 
510.parest_r:  -DSPEC_LP64 
511.povray_r:  -DSPEC_LP64 
519.lbm_r:  -DSPEC_LP64 
521.wrf_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
526.blender_r:  -DSPEC_LP64   -DSPEC_LINUX   -funsigned-char 
527.cam4_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
538.imagick_r:  -DSPEC_LP64 
544.nab_r:  -DSPEC_LP64 
549.fotonik3d_r:  -DSPEC_LP64 
554.roms_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -w   -std=c11   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/home/cpu2017/je5.0.1-64 

C++ benchmarks:

 -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/home/cpu2017/je5.0.1-64 

Fortran benchmarks:

 -w   -m64   -Wl,-z,muldefs   -xCORE-AVX512   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -qopt-mem-layout-trans=4   -nostandard-realloc-lhs   -align array32byte   -mbranches-within-32B-boundaries   -ljemalloc   -L/home/cpu2017/je5.0.1-64 

Benchmarks using both Fortran and C:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -O3   -ipo   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -align array32byte   -ljemalloc   -L/home/cpu2017/je5.0.1-64 

Benchmarks using both C and C++:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -mbranches-within-32B-boundaries   -ljemalloc   -L/home/cpu2017/je5.0.1-64 

Benchmarks using Fortran, C, and C++:

 -w   -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX512   -Ofast   -ffast-math   -flto   -mfpmath=sse   -funroll-loops   -qopt-mem-layout-trans=4   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-multiple-gather-scatter-by-shuffles   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -align array32byte   -ljemalloc   -L/home/cpu2017/je5.0.1-64 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.2021-12-22.html,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.0-ICX-revJ.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.2021-12-22.xml,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.0-ICX-revJ.xml.