SPEC CPU®2017 Integer Rate Result

Copyright 2017-2021 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C225 M6 (AMD EPYC 7272 12-Core)

SPECrate®2017_int_base = 18000

SPECrate®2017_int_peak = 18800
CPU2017 License: 9019 Test Date: Nov-2021
Test Sponsor: Cisco Systems Hardware Availability: Jun-2021
Tested by: Cisco Systems Software Availability: Jun-2021

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: AMD EPYC 7272
  Max MHz: 3200
  Nominal: 2900
Enabled: 24 cores, 2 chips, 2 threads/core
Orderable: 1,2 chips
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 512 KB I+D on chip per core
  L3: 64 MB I+D on chip per chip,
16 MB shared / 3 cores
  Other: None
Memory: 2 TB (16 x 128 GB 4Rx4 PC4-3200V-L)
Storage: 1 x 960 GB M.2 SSD SATA
Other: None
Software
OS: SUSE Linux Enterprise Server 15 SP3 (x86_64)
kernel version
5.3.18-57-default
Compiler: C/C++/Fortran: Version 3.0.0 of AOCC
Parallel: No
Firmware: Version 4.2.1c released Aug-2021
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 32/64-bit
Other: jemalloc: jemalloc memory allocator library v5.1.0
Power Management: BIOS and OS set to prefer performance at the cost
of additional power usage

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate®2017_int_base 18000
SPECrate®2017_int_peak 18800
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
500.perlbench_r 48 620 1230 623 1230 624 1230 48 599 1280 597 1280 593 1290
502.gcc_r 48 448 1520 446 1520 448 1520 48 370 1840 368 1850 369 1840
505.mcf_r 48 277 2800 276 2810 275 2820 48 277 2800 276 2810 275 2820
520.omnetpp_r 48 716 88.0 714 88.1 716 88.0 48 686 91.8 686 91.8 687 91.7
523.xalancbmk_r 48 247 2050 246 2060 247 2050 48 220 2310 219 2320 219 2310
525.x264_r 48 214 3920 214 3920 215 3920 48 214 3920 214 3920 215 3920
531.deepsjeng_r 48 353 1560 361 1520 359 1530 48 353 1560 361 1520 359 1530
541.leela_r 48 547 1450 547 1450 547 1450 48 547 1450 547 1450 547 1450
548.exchange2_r 48 289 4350 302 4170 295 4270 48 295 4270 294 4270 295 4270
557.xz_r 48 502 1030 501 1030 501 1030 48 501 1040 500 1040 500 1040

Compiler Notes

The AMD64 AOCC Compiler Suite is available at
http://developer.amd.com/amd-aocc/

Submit Notes

The config file option 'submit' was used.
'numactl' was used to bind copies to the cores.
See the configuration file for details.

Operating System Notes

'ulimit -s unlimited' was used to set environment stack size limit
'ulimit -l 2097152' was used to set environment locked pages in memory limit

runcpu command invoked through numactl i.e.:
numactl --interleave=all runcpu <etc>

To limit dirty cache to 8% of memory, 'sysctl -w vm.dirty_ratio=8' run as root.
To limit swap usage to minimum necessary, 'sysctl -w vm.swappiness=1' run as root.
To free node-local memory and avoid remote memory usage,
'sysctl -w vm.zone_reclaim_mode=1' run as root.
To clear filesystem caches, 'sync; sysctl -w vm.drop_caches=3' run as root.
To disable address space layout randomization (ASLR) to reduce run-to-run
variability, 'sysctl -w kernel.randomize_va_space=0' run as root.

To enable Transparent Hugepages (THP) only on request for base runs,
'echo madvise > /sys/kernel/mm/transparent_hugepage/enabled' run as root.
To enable THP for all allocations for peak runs,
'echo always > /sys/kernel/mm/transparent_hugepage/enabled' and
'echo always > /sys/kernel/mm/transparent_hugepage/defrag' run as root.

Environment Variables Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH =
     "/home/cpu2017/amd_rate_aocc300_milan_B_lib/lib;/home/cpu2017/amd_rate_a
     occ300_milan_B_lib/lib32:"
MALLOC_CONF = "retain:true"

Environment variables set by runcpu during the 523.xalancbmk_r peak run:
MALLOC_CONF = "thp:never"

General Notes

Binaries were compiled on a system with 2x AMD EPYC 7742 CPU + 1TiB Memory using OpenSUSE 15.2

NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.

jemalloc: configured and built with GCC v4.8.2 in RHEL 7.4 (No options specified)
jemalloc 5.1.0 is available here:
https://github.com/jemalloc/jemalloc/releases/download/5.1.0/jemalloc-5.1.0.tar.bz2

Platform Notes

BIOS Configuration
 SMT Mode set to Auto
 NUMA nodes per socket set to NPS4
 ACPI SRAT L3 Cache As NUMA Domain set to Enabled
 DRAM Scrub Time set to Disabled
 Determinism Slider set to Power
 Memory Interleaving set to Auto
 APBDIS set to 1

 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d
 running on localhost Fri Nov 12 12:49:07 2021

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : AMD EPYC 7272 12-Core Processor
       2  "physical id"s (chips)
       48 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 12
       siblings  : 24
       physical 0: cores 0 1 2 4 5 6 8 9 10 12 13 14
       physical 1: cores 0 1 2 4 5 6 8 9 10 12 13 14

 From lscpu from util-linux 2.36.2:
      Architecture:                    x86_64
      CPU op-mode(s):                  32-bit, 64-bit
      Byte Order:                      Little Endian
      Address sizes:                   43 bits physical, 48 bits virtual
      CPU(s):                          48
      On-line CPU(s) list:             0-47
      Thread(s) per core:              2
      Core(s) per socket:              12
      Socket(s):                       2
      NUMA node(s):                    2
      Vendor ID:                       AuthenticAMD
      CPU family:                      23
      Model:                           49
      Model name:                      AMD EPYC 7272 12-Core Processor
      Stepping:                        0
      Frequency boost:                 enabled
      CPU MHz:                         1759.865
      CPU max MHz:                     2900.0000
      CPU min MHz:                     1500.0000
      BogoMIPS:                        5788.99
      Virtualization:                  AMD-V
      L1d cache:                       768 KiB
      L1i cache:                       768 KiB
      L2 cache:                        12 MiB
      L3 cache:                        128 MiB
      NUMA node0 CPU(s):               0-11,24-35
      NUMA node1 CPU(s):               12-23,36-47
      Vulnerability Itlb multihit:     Not affected
      Vulnerability L1tf:              Not affected
      Vulnerability Mds:               Not affected
      Vulnerability Meltdown:          Not affected
      Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via
      prctl and seccomp
      Vulnerability Spectre v1:        Mitigation; usercopy/swapgs barriers and __user
      pointer sanitization
      Vulnerability Spectre v2:        Mitigation; Full AMD retpoline, IBPB conditional,
      IBRS_FW, STIBP conditional, RSB filling
      Vulnerability Srbds:             Not affected
      Vulnerability Tsx async abort:   Not affected
      Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr
      pge mca cmov pat pse36 clflush mmx fxsr sse sse2 ht syscall nx mmxext fxsr_opt
      pdpe1gb rdtscp lm constant_tsc rep_good nopl nonstop_tsc cpuid extd_apicid
      aperfmperf pni pclmulqdq monitor ssse3 fma cx16 sse4_1 sse4_2 movbe popcnt aes xsave
      avx f16c rdrand lahf_lm cmp_legacy svm extapic cr8_legacy abm sse4a misalignsse
      3dnowprefetch osvw ibs skinit wdt tce topoext perfctr_core perfctr_nb bpext
      perfctr_llc mwaitx cpb cat_l3 cdp_l3 hw_pstate sme ssbd mba sev ibrs ibpb stibp
      vmmcall sev_es fsgsbase bmi1 avx2 smep bmi2 cqm rdt_a rdseed adx smap clflushopt
      clwb sha_ni xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total
      cqm_mbm_local clzero irperf xsaveerptr wbnoinvd arat npt lbrv svm_lock nrip_save
      tsc_scale vmcb_clean flushbyasid decodeassists pausefilter pfthreshold avic
      v_vmsave_vmload vgif umip rdpid overflow_recov succor smca

 From lscpu --cache:
      NAME ONE-SIZE ALL-SIZE WAYS TYPE        LEVEL  SETS PHY-LINE COHERENCY-SIZE
      L1d       32K     768K    8 Data            1    64        1             64
      L1i       32K     768K    8 Instruction     1    64        1             64
      L2       512K      12M    8 Unified         2  1024        1             64
      L3        16M     128M   16 Unified         3 16384        1             64

 /proc/cpuinfo cache data
    cache size : 512 KB

 From numactl --hardware
 WARNING: a numactl 'node' might or might not correspond to a physical chip.
   available: 2 nodes (0-1)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 24 25 26 27 28 29 30 31 32 33 34 35
   node 0 size: 1019893 MB
   node 0 free: 1018973 MB
   node 1 cpus: 12 13 14 15 16 17 18 19 20 21 22 23 36 37 38 39 40 41 42 43 44 45 46 47
   node 1 size: 1032149 MB
   node 1 free: 1031507 MB
   node distances:
   node   0   1
     0:  10  32
     1:  32  10

 From /proc/meminfo
    MemTotal:       2101292744 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /sys/devices/system/cpu/cpu*/cpufreq/scaling_governor has
    ondemand

 From /etc/*release* /etc/*version*
    os-release:
       NAME="SLES"
       VERSION="15-SP3"
       VERSION_ID="15.3"
       PRETTY_NAME="SUSE Linux Enterprise Server 15 SP3"
       ID="sles"
       ID_LIKE="suse"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:15:sp3"

 uname -a:
    Linux localhost 5.3.18-57-default #1 SMP Wed Apr 28 10:54:41 UTC 2021 (ba3c2e9) x86_64
    x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-12207 (iTLB Multihit):                        Not affected
 CVE-2018-3620 (L1 Terminal Fault):                     Not affected
 Microarchitectural Data Sampling:                      Not affected
 CVE-2017-5754 (Meltdown):                              Not affected
 CVE-2018-3639 (Speculative Store Bypass):              Mitigation: Speculative Store
                                                        Bypass disabled via prctl and
                                                        seccomp
 CVE-2017-5753 (Spectre variant 1):                     Mitigation: usercopy/swapgs
                                                        barriers and __user pointer
                                                        sanitization
 CVE-2017-5715 (Spectre variant 2):                     Mitigation: Full AMD retpoline,
                                                        IBPB: conditional, IBRS_FW, STIBP:
                                                        conditional, RSB filling
 CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected
 CVE-2019-11135 (TSX Asynchronous Abort):               Not affected

 run-level 3 Nov 12 10:41

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda3      xfs   557G   11G  546G   2% /

 From /sys/devices/virtual/dmi/id
     Vendor:         Cisco Systems Inc
     Product:        UCSC-C225-M6S
     Serial:         WZP252309U3

 Additional information from dmidecode 3.2 follows.  WARNING: Use caution when you
 interpret this section. The 'dmidecode' program reads system data which is "intended to
 allow hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     16x 0xCE00 M386AAG40AM3-CWE 128 GB 4 rank 3200

 BIOS:
    BIOS Vendor:       Cisco Systems Inc
    BIOS Version:      C225M6.4.2.1c.0.0806211349
    BIOS Date:         08/06/2021
    BIOS Revision:     5.14

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C       | 502.gcc_r(peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: i386-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

==============================================================================
C       | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak)
        | 525.x264_r(base, peak) 557.xz_r(base, peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

==============================================================================
C       | 502.gcc_r(peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: i386-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

==============================================================================
C       | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak)
        | 525.x264_r(base, peak) 557.xz_r(base, peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

==============================================================================
C++     | 523.xalancbmk_r(peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: i386-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

==============================================================================
C++     | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base)
        | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

==============================================================================
C++     | 523.xalancbmk_r(peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: i386-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

==============================================================================
C++     | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base)
        | 531.deepsjeng_r(base, peak) 541.leela_r(base, peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

==============================================================================
Fortran | 548.exchange2_r(base, peak)
------------------------------------------------------------------------------
AMD clang version 12.0.0 (CLANG: AOCC_3.0.0-Build#78 2020_12_10) (based on
  LLVM Mirror.Version.12.0.0)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: /opt/AMD/aocc-compiler-3.0.0/bin
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 clang 

C++ benchmarks:

 clang++ 

Fortran benchmarks:

 flang 

Base Portability Flags

500.perlbench_r:  -DSPEC_LINUX_X64   -DSPEC_LP64 
502.gcc_r:  -DSPEC_LP64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -DSPEC_LINUX   -DSPEC_LP64 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -m64   -Wl,-allow-multiple-definition   -Wl,-mllvm -Wl,-enable-licm-vrp   -flto   -Wl,-mllvm -Wl,-region-vectorize   -Wl,-mllvm -Wl,-function-specialize   -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6   -Wl,-mllvm -Wl,-reduce-array-computations=3   -O3   -ffast-math   -march=znver3   -fveclib=AMDLIBM   -fstruct-layout=5   -mllvm -unroll-threshold=50   -mllvm -inline-threshold=1000   -fremap-arrays   -mllvm -function-specialize   -flv-function-specialization   -mllvm -enable-gvn-hoist   -mllvm -global-vectorize-slp=true   -mllvm -enable-licm-vrp   -mllvm -reduce-array-computations=3   -z muldefs   -lamdlibm   -ljemalloc   -lflang   -lflangrti 

C++ benchmarks:

 -m64   -std=c++98   -Wl,-mllvm -Wl,-do-block-reorder=aggressive   -flto   -Wl,-mllvm -Wl,-region-vectorize   -Wl,-mllvm -Wl,-function-specialize   -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6   -Wl,-mllvm -Wl,-reduce-array-computations=3   -O3   -ffast-math   -march=znver3   -fveclib=AMDLIBM   -mllvm -enable-partial-unswitch   -mllvm -unroll-threshold=100   -finline-aggressive   -flv-function-specialization   -mllvm -loop-unswitch-threshold=200000   -mllvm -reroll-loops   -mllvm -aggressive-loop-unswitch   -mllvm -extra-vectorizer-passes   -mllvm -reduce-array-computations=3   -mllvm -global-vectorize-slp=true   -mllvm -convert-pow-exp-to-int=false   -z muldefs   -mllvm -do-block-reorder=aggressive   -fvirtual-function-elimination   -fvisibility=hidden   -lamdlibm   -ljemalloc   -lflang   -lflangrti 

Fortran benchmarks:

 -m64   -Wl,-mllvm -Wl,-inline-recursion=4   -Wl,-mllvm -Wl,-lsr-in-nested-loop   -Wl,-mllvm -Wl,-enable-iv-split   -flto   -Wl,-mllvm -Wl,-region-vectorize   -Wl,-mllvm -Wl,-function-specialize   -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6   -Wl,-mllvm -Wl,-reduce-array-computations=3   -O3   -ffast-math   -march=znver3   -fveclib=AMDLIBM   -z muldefs   -mllvm -unroll-aggressive   -mllvm -unroll-threshold=500   -lamdlibm   -ljemalloc   -lflang   -lflangrti 

Base Other Flags

C benchmarks:

 -Wno-unused-command-line-argument 

C++ benchmarks:

 -Wno-unused-command-line-argument 

Peak Compiler Invocation

C benchmarks:

 clang 

C++ benchmarks:

 clang++ 

Fortran benchmarks:

 flang 

Peak Portability Flags

500.perlbench_r:  -DSPEC_LINUX_X64   -DSPEC_LP64 
502.gcc_r:  -D_FILE_OFFSET_BITS=64 
505.mcf_r:  -DSPEC_LP64 
520.omnetpp_r:  -DSPEC_LP64 
523.xalancbmk_r:  -DSPEC_LINUX   -DSPEC_LP64 
525.x264_r:  -DSPEC_LP64 
531.deepsjeng_r:  -DSPEC_LP64 
541.leela_r:  -DSPEC_LP64 
548.exchange2_r:  -DSPEC_LP64 
557.xz_r:  -DSPEC_LP64 

Peak Optimization Flags

C benchmarks:

500.perlbench_r:  -m64   -Wl,-allow-multiple-definition   -Wl,-mllvm -Wl,-enable-licm-vrp   -flto   -Wl,-mllvm -Wl,-function-specialize   -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6   -Wl,-mllvm -Wl,-reduce-array-computations=3   -fprofile-instr-generate(pass 1)   -fprofile-instr-use(pass 2)   -Ofast   -march=znver3   -fveclib=AMDLIBM   -fstruct-layout=7   -mllvm -unroll-threshold=50   -fremap-arrays   -flv-function-specialization   -mllvm -inline-threshold=1000   -mllvm -enable-gvn-hoist   -mllvm -global-vectorize-slp=false   -mllvm -function-specialize   -mllvm -enable-licm-vrp   -mllvm -reduce-array-computations=3   -lamdlibm   -ljemalloc 
502.gcc_r:  -m32   -Wl,-allow-multiple-definition   -Wl,-mllvm -Wl,-enable-licm-vrp   -flto   -Wl,-mllvm -Wl,-function-specialize   -Ofast   -march=znver3   -fveclib=AMDLIBM   -fstruct-layout=7   -mllvm -unroll-threshold=50   -fremap-arrays   -flv-function-specialization   -mllvm -inline-threshold=1000   -mllvm -enable-gvn-hoist   -mllvm -global-vectorize-slp=true   -mllvm -function-specialize   -mllvm -enable-licm-vrp   -mllvm -reduce-array-computations=3   -fgnu89-inline   -ljemalloc 
505.mcf_r:  basepeak = yes 
525.x264_r:  basepeak = yes 
557.xz_r:  -m64   -Wl,-allow-multiple-definition   -Wl,-mllvm -Wl,-enable-licm-vrp   -flto   -Wl,-mllvm -Wl,-function-specialize   -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6   -Wl,-mllvm -Wl,-reduce-array-computations=3   -Ofast   -march=znver3   -fveclib=AMDLIBM   -fstruct-layout=7   -mllvm -unroll-threshold=50   -fremap-arrays   -flv-function-specialization   -mllvm -inline-threshold=1000   -mllvm -enable-gvn-hoist   -mllvm -global-vectorize-slp=true   -mllvm -function-specialize   -mllvm -enable-licm-vrp   -mllvm -reduce-array-computations=3   -lamdlibm   -ljemalloc 

C++ benchmarks:

520.omnetpp_r:  -m64   -std=c++98   -Wl,-mllvm -Wl,-do-block-reorder=aggressive   -flto   -Wl,-mllvm -Wl,-function-specialize   -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6   -Wl,-mllvm -Wl,-reduce-array-computations=3   -Ofast   -march=znver3   -fveclib=AMDLIBM   -finline-aggressive   -mllvm -unroll-threshold=100   -flv-function-specialization   -mllvm -enable-licm-vrp   -mllvm -reroll-loops   -mllvm -aggressive-loop-unswitch   -mllvm -reduce-array-computations=3   -mllvm -global-vectorize-slp=true   -mllvm -do-block-reorder=aggressive   -fvirtual-function-elimination   -fvisibility=hidden   -lamdlibm   -ljemalloc 
523.xalancbmk_r:  -m32   -Wl,-mllvm -Wl,-do-block-reorder=aggressive   -flto   -Wl,-mllvm -Wl,-function-specialize   -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6   -Wl,-mllvm -Wl,-reduce-array-computations=3   -Ofast   -march=znver3   -fveclib=AMDLIBM   -finline-aggressive   -mllvm -unroll-threshold=100   -flv-function-specialization   -mllvm -enable-licm-vrp   -mllvm -reroll-loops   -mllvm -aggressive-loop-unswitch   -mllvm -reduce-array-computations=3   -mllvm -global-vectorize-slp=true   -mllvm -do-block-reorder=aggressive   -fvirtual-function-elimination   -fvisibility=hidden   -ljemalloc 
531.deepsjeng_r:  basepeak = yes 
541.leela_r:  Same as 520.omnetpp_r 

Fortran benchmarks:

 -m64   -Wl,-mllvm -Wl,-inline-recursion=4   -Wl,-mllvm -Wl,-lsr-in-nested-loop   -Wl,-mllvm -Wl,-enable-iv-split   -flto   -Wl,-mllvm -Wl,-function-specialize   -Wl,-mllvm -Wl,-align-all-nofallthru-blocks=6   -Wl,-mllvm -Wl,-reduce-array-computations=3   -O3   -ffast-math   -march=znver3   -fveclib=AMDLIBM   -mllvm -unroll-aggressive   -mllvm -unroll-threshold=500   -lamdlibm   -ljemalloc   -lflang   -lflangrti 

Peak Other Flags

C benchmarks (except as noted below):

 -Wno-unused-command-line-argument 
502.gcc_r:  -L/usr/lib   -Wno-unused-command-line-argument   -L/sppo/bin/cpu2017v115aocc3/amd_rate_aocc300_milan_A_lib/32 

C++ benchmarks (except as noted below):

 -Wno-unused-command-line-argument 
523.xalancbmk_r:  -L/usr/lib   -Wno-unused-command-line-argument   -L/sppo/bin/cpu2017v115aocc3/amd_rate_aocc300_milan_A_lib/32 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/aocc300-flags-B2.html,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-AMD-v2-revC.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/aocc300-flags-B2.xml,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-AMD-v2-revC.xml.

SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders.

For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org
Copyright 2017-2021 Standard Performance Evaluation Corporation
Tested with SPEC CPU®2017 v1.1.8 on 2021-11-12 15:49:07-0500.
Report generated on 2021-12-22 12:33:52 by SPEC CPU®2017 HTML formatter v6442.
Originally published on 2021-12-21.