SPEC CPU®2026 Flag Description
Lenovo Global Technology ThinkSystem SR665 V3 (2.10 GHz, AMD EPYC 9845)
Compilers: AMD Optimizing C/C++ Compiler Suite
Base Compiler Invocation
C benchmarks
-
- clang
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CC, LD
-
clang is a C compiler which encompasses preprocessing, parsing, optimization, code generation, assembly, and linking.
Depending on which high-level mode setting is passed, Clang will stop before doing a full link.
C++ benchmarks
-
- clang++
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CXX, LD
-
clang++ C++ compiler which encompasses preprocessing, parsing, optimization, code generation, assembly, and linking.
Depending on which high-level mode setting is passed, Clang will stop before doing a full link.
Fortran benchmarks
-
- flang
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- FC, LD
-
flang is a Fortran compiler which encompasses parsing, optimization, code generation, assembly, and linking. Depending on
which high-level mode setting is passed, Flang will stop before doing a full link.
Benchmarks using both C and C++
-
- clang++
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CXX, LD
-
clang++ C++ compiler which encompasses preprocessing, parsing, optimization, code generation, assembly, and linking.
Depending on which high-level mode setting is passed, Clang will stop before doing a full link.
-
- clang
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CC
-
clang is a C compiler which encompasses preprocessing, parsing, optimization, code generation, assembly, and linking.
Depending on which high-level mode setting is passed, Clang will stop before doing a full link.
Base Portability Flags
By Benchmark
709.cactus_r
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
722.palm_r
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
731.astcenc_r
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
736.ocio_r
-
- -fno-finite-math-only
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- PORTABILITY
-
fno-finite-math-only, which is implied by -ffast-math and -Ofast, allows
optimizations for floating-point arithmetic that assume that arguments and results are not NaNs or +-Infs.
Setting -fno-finite-math-only does the opposite: the compiler must prepare for the possible presence of
NaNs and infinities.
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
737.gmsh_r
-
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
748.flightdm_r
-
- -fno-reciprocal-math
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- PORTABILITY
-
-freciprocal-math allows the compiler to replace floating-point division operations
with multiplication by a reciprocal (for example, replacing x / y with
x * (1.0 / y)). This can significantly improve performance on some architectures,
but may reduce numerical accuracy.
This option is implied by -ffast-math and -Ofast.
Using -fno-reciprocal-math forces the compiler to preserve exact division semantics.
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
749.fotonik3d_r
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
765.roms_r
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
766.femflow_r
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
767.nest_r
-
- -fno-finite-math-only
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- PORTABILITY
-
fno-finite-math-only, which is implied by -ffast-math and -Ofast, allows
optimizations for floating-point arithmetic that assume that arguments and results are not NaNs or +-Infs.
Setting -fno-finite-math-only does the opposite: the compiler must prepare for the possible presence of
NaNs and infinities.
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
772.marian_r
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
782.lbm_r
-
![[suite]](https://www.spec.org/auto/cpu2026/images/suite.png)
- EXTRA_PORTABILITY
-
This option is used to indicate that the host system's integers are 32-bits
wide, and longs and pointers are 64-bits wide. Not all benchmarks
recognize this macro, but the preferred practice for data model selection
applies the flags to all benchmarks; this flag description is a placeholder
for those benchmarks that do not recognize this macro.
Base Optimization Flags
C benchmarks
-
- -m64
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CC, LD
-
Generates code for a 64-bit environment. The 64-bit environment sets int to 32 bits and long and
pointer to 64 bits and generates code for AMD's x86-64 architecture. The compiler generates AMD64, INTEL64,
x86-64 64-bit ABI. The default on a 32-bit host is 32-bit ABI. The default on a 64-bit host is 64-bit ABI if the target
platform specified is 64-bit, otherwise the default is 32-bit.
-
-
-
-
-
-
- -ffast-math
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- OPTIMIZE
-
Enables a range of optimizations that provide faster, though sometimes less precise, mathematical operations that may
not conform to the IEEE-754 specifications. When this option is specified, the __STDC_IEC_559__ macro is
ignored even if set by the system headers.
-
- -O3
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- COPTIMIZE
-
Like -O2, except that it enables optimizations that take longer to perform or that may generate larger code (in
an attempt to make the program run faster).
If multiple "O" options are used, with or without level numbers, the last such option is the one that is effective.
- Includes:
-
- -march=znver5
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- COPTIMIZE
-
Specify that Clang should generate code for a specific processor family member and later. For example, if you specify
-march=znver1, the compiler is allowed to generate instructions that are valid on AMD Zen processors, but
which may not exist on earlier products. -march=znver4 enables AVX 512 ISA for Genoa (znver4) processors.
-
-
-
-
-
- -fstruct-layout=7
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- COPTIMIZE
-
Analyzes the whole program to determine if the structures in the code can be peeled, if dead or redundant fields can be deleted, and if
the pointer or integer fields in the structure can be compressed. If feasible, this optimization transforms the code to
enable these improvements. This transformation is likely to improve cache utilization and memory bandwidth. It is expected
to improve the scalability of programs executed on multiple cores.
This is effective only under flto as the whole program analysis is required to perform this optimization. You can choose
different levels of aggressiveness with which this optimization can be applied to your application; with 1 being the least
aggressive and 7 being the most aggressive level.
Possible values:
- fstruct-layout=0: disables structure peeling (default).
- fstruct-layout=1: enables structure peeling.
- fstruct-layout=2: enables structure peeling and selectively compresses self-referential pointers in these
structures to 32-bit pointers wherever safe.
- fstruct-layout=3: enables structure peeling and selectively compresses self-referential pointers in these
structures to 16-bit pointers wherever safe.
- fstruct-layout=4: enables structure peeling, pointer compression as in level 2 and further enables
compression of structure fields which are of 64-bit integer type to 32-bit integer type. This is performed under a
strict safety check.
- fstruct-layout=5: enables structure peeling, pointer compression as in level 3 and further enables compression
of structure fields which are of 64-bit integer type to 32-bit integer type. This is performed under a strict safety
check.
- fstruct-layout=6: enables structure peeling, pointer compression as in level 2 and further enables compression
of structure fields which are of type 64-bit integer type to 16-bit integer type. This is performed under a strict
safety check.
- fstruct-layout=7: enables structure peeling, pointer compression as in level 3 and further enables compression
of structure fields which are of type 64-bit integer type to 16-bit integer type. This is performed under a strict
safety check.
- fstruct-layout=8: enables structure peeling, pointer compression, 64 bit integer type compression
as in level 6 and creates optimal ordering of peeled structure fields which could improve runtime performance.
- fstruct-layout=9: enables structure peeling, pointer compression, 64 bit integer type compression
as in level 7 and creates optimal ordering of peeled structure fields which could improve runtime performance.
Note:
fstruct-layout=4 and fstruct-layout=5 are derived from fstruct-layout=2 and fstruct-layout=3 respectively with the added
feature of safe compression of 64-bit integer fields to 32-bit integer fields in structures. Going from
fstruct-layout=4 to fstruct-layout=5 may result in higher performance if the pointer values are such that the pointers
can be compressed to 16-bits.
fstruct-layout=6 and fstruct-layout=7 are derived from fstruct-layout=2 and fstructlayout=3 respectively, with the
added feature of safe compression of 64 bit integer fields to 16 bit integer in structures. Going from fstruct-layout=6
to fstruct-layout=7 may result in higher performance if the pointer values are such that the pointers can be
compressed to 16-bits.
-
-
-
-
-
-
- -zopt
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- COPTIMIZE
-
This option enables a subset of scalar, vector and loop transformations including improved variants of loop invariant code motion, SLP and loop vectorizations, loop-fusion, loop-interchange, loop-unswitch, loop tiling and loop distribution.
-
-
-
C++ benchmarks
-
- -m64
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CXX, LD
-
Generates code for a 64-bit environment. The 64-bit environment sets int to 32 bits and long and
pointer to 64 bits and generates code for AMD's x86-64 architecture. The compiler generates AMD64, INTEL64,
x86-64 64-bit ABI. The default on a 32-bit host is 32-bit ABI. The default on a 64-bit host is 64-bit ABI if the target
platform specified is 64-bit, otherwise the default is 32-bit.
-
-
-
-
-
-
- -ffast-math
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- OPTIMIZE
-
Enables a range of optimizations that provide faster, though sometimes less precise, mathematical operations that may
not conform to the IEEE-754 specifications. When this option is specified, the __STDC_IEC_559__ macro is
ignored even if set by the system headers.
-
- -O3
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CXXOPTIMIZE
-
Like -O2, except that it enables optimizations that take longer to perform or that may generate larger code (in
an attempt to make the program run faster).
If multiple "O" options are used, with or without level numbers, the last such option is the one that is effective.
- Includes:
-
- -march=znver5
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CXXOPTIMIZE
-
Specify that Clang should generate code for a specific processor family member and later. For example, if you specify
-march=znver1, the compiler is allowed to generate instructions that are valid on AMD Zen processors, but
which may not exist on earlier products. -march=znver4 enables AVX 512 ISA for Genoa (znver4) processors.
-
-
-
-
-
-
- -zopt
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CXXOPTIMIZE
-
This option enables a subset of scalar, vector and loop transformations including improved variants of loop invariant code motion, SLP and loop vectorizations, loop-fusion, loop-interchange, loop-unswitch, loop tiling and loop distribution.
-
-
-
Fortran benchmarks
-
- -m64
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- FC, LD
-
Generates code for a 64-bit environment. The 64-bit environment sets int to 32 bits and long and
pointer to 64 bits and generates code for AMD's x86-64 architecture. The compiler generates AMD64, INTEL64,
x86-64 64-bit ABI. The default on a 32-bit host is 32-bit ABI. The default on a 64-bit host is 64-bit ABI if the target
platform specified is 64-bit, otherwise the default is 32-bit.
-
-
-
-
-
-
-
- -ffast-math
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- OPTIMIZE
-
Enables a range of optimizations that provide faster, though sometimes less precise, mathematical operations that may
not conform to the IEEE-754 specifications. When this option is specified, the __STDC_IEC_559__ macro is
ignored even if set by the system headers.
-
- -O3
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- FOPTIMIZE
-
Like -O2, except that it enables optimizations that take longer to perform or that may generate larger code (in
an attempt to make the program run faster).
If multiple "O" options are used, with or without level numbers, the last such option is the one that is effective.
- Includes:
-
- -march=znver5
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- FOPTIMIZE
-
Specify that Clang should generate code for a specific processor family member and later. For example, if you specify
-march=znver1, the compiler is allowed to generate instructions that are valid on AMD Zen processors, but
which may not exist on earlier products. -march=znver4 enables AVX 512 ISA for Genoa (znver4) processors.
-
-
-
- -Mrecursive
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- FOPTIMIZE
-
Allocate local variables on the stack, thus allowing recursion.
SAVEd, data-initialized, or namelist members are always allocated
statically, regardless of the setting of this switch.
-
-
-
-
-
- -zopt
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- FOPTIMIZE
-
This option enables a subset of scalar, vector and loop transformations including improved variants of loop invariant code motion, SLP and loop vectorizations, loop-fusion, loop-interchange, loop-unswitch, loop tiling and loop distribution.
-
-
-
Benchmarks using both C and C++
-
- -m64
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- CC, CXX, LD
-
Generates code for a 64-bit environment. The 64-bit environment sets int to 32 bits and long and
pointer to 64 bits and generates code for AMD's x86-64 architecture. The compiler generates AMD64, INTEL64,
x86-64 64-bit ABI. The default on a 32-bit host is 32-bit ABI. The default on a 64-bit host is 64-bit ABI if the target
platform specified is 64-bit, otherwise the default is 32-bit.
-
-
-
-
-
-
-
- -ffast-math
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- OPTIMIZE
-
Enables a range of optimizations that provide faster, though sometimes less precise, mathematical operations that may
not conform to the IEEE-754 specifications. When this option is specified, the __STDC_IEC_559__ macro is
ignored even if set by the system headers.
-
- -O3
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- COPTIMIZE, CXXOPTIMIZE
-
Like -O2, except that it enables optimizations that take longer to perform or that may generate larger code (in
an attempt to make the program run faster).
If multiple "O" options are used, with or without level numbers, the last such option is the one that is effective.
- Includes:
-
- -march=znver5
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- COPTIMIZE, CXXOPTIMIZE
-
Specify that Clang should generate code for a specific processor family member and later. For example, if you specify
-march=znver1, the compiler is allowed to generate instructions that are valid on AMD Zen processors, but
which may not exist on earlier products. -march=znver4 enables AVX 512 ISA for Genoa (znver4) processors.
-
-
-
-
-
- -fstruct-layout=7
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- COPTIMIZE
-
Analyzes the whole program to determine if the structures in the code can be peeled, if dead or redundant fields can be deleted, and if
the pointer or integer fields in the structure can be compressed. If feasible, this optimization transforms the code to
enable these improvements. This transformation is likely to improve cache utilization and memory bandwidth. It is expected
to improve the scalability of programs executed on multiple cores.
This is effective only under flto as the whole program analysis is required to perform this optimization. You can choose
different levels of aggressiveness with which this optimization can be applied to your application; with 1 being the least
aggressive and 7 being the most aggressive level.
Possible values:
- fstruct-layout=0: disables structure peeling (default).
- fstruct-layout=1: enables structure peeling.
- fstruct-layout=2: enables structure peeling and selectively compresses self-referential pointers in these
structures to 32-bit pointers wherever safe.
- fstruct-layout=3: enables structure peeling and selectively compresses self-referential pointers in these
structures to 16-bit pointers wherever safe.
- fstruct-layout=4: enables structure peeling, pointer compression as in level 2 and further enables
compression of structure fields which are of 64-bit integer type to 32-bit integer type. This is performed under a
strict safety check.
- fstruct-layout=5: enables structure peeling, pointer compression as in level 3 and further enables compression
of structure fields which are of 64-bit integer type to 32-bit integer type. This is performed under a strict safety
check.
- fstruct-layout=6: enables structure peeling, pointer compression as in level 2 and further enables compression
of structure fields which are of type 64-bit integer type to 16-bit integer type. This is performed under a strict
safety check.
- fstruct-layout=7: enables structure peeling, pointer compression as in level 3 and further enables compression
of structure fields which are of type 64-bit integer type to 16-bit integer type. This is performed under a strict
safety check.
- fstruct-layout=8: enables structure peeling, pointer compression, 64 bit integer type compression
as in level 6 and creates optimal ordering of peeled structure fields which could improve runtime performance.
- fstruct-layout=9: enables structure peeling, pointer compression, 64 bit integer type compression
as in level 7 and creates optimal ordering of peeled structure fields which could improve runtime performance.
Note:
fstruct-layout=4 and fstruct-layout=5 are derived from fstruct-layout=2 and fstruct-layout=3 respectively with the added
feature of safe compression of 64-bit integer fields to 32-bit integer fields in structures. Going from
fstruct-layout=4 to fstruct-layout=5 may result in higher performance if the pointer values are such that the pointers
can be compressed to 16-bits.
fstruct-layout=6 and fstruct-layout=7 are derived from fstruct-layout=2 and fstructlayout=3 respectively, with the
added feature of safe compression of 64 bit integer fields to 16 bit integer in structures. Going from fstruct-layout=6
to fstruct-layout=7 may result in higher performance if the pointer values are such that the pointers can be
compressed to 16-bits.
-
-
-
-
-
-
- -zopt
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
- COPTIMIZE, CXXOPTIMIZE
-
This option enables a subset of scalar, vector and loop transformations including improved variants of loop invariant code motion, SLP and loop vectorizations, loop-fusion, loop-interchange, loop-unswitch, loop tiling and loop distribution.
-
-
-
-
-
Peak Optimization Flags
C benchmarks
782.lbm_r
C++ benchmarks
731.astcenc_r
736.ocio_r
748.flightdm_r
766.femflow_r
767.nest_r
772.marian_r
Fortran benchmarks
722.palm_r
749.fotonik3d_r
765.roms_r
Benchmarks using both C and C++
709.cactus_r
737.gmsh_r
Implicitly Included Flags
This section contains descriptions of flags that were included implicitly
by other flags, but which do not have a permanent home at SPEC.
-
- -O2
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
-
Moderate level of optimization which enables most optimizations. This is the default when no "-O" option is
specified, or if no value is specified (i.e. "-O").
If multiple "O" options are used, with or without level numbers, the last such option is the one that is effective.
- Includes:
-
- -O1
![[user]](https://www.spec.org/auto/cpu2026/images/user.png)
-
Somewhere between -O0 and -O2.
If multiple "O" options are used, with or without level numbers, the last such option is the one that is effective.
Commands and Options Used to Submit Benchmark Runs
Using numactl to bind processes and memory to cores
For multi-copy runs or single copy runs on systems with multiple sockets, it is advantageous to bind a process to a
particular core. Otherwise, the OS may arbitrarily move your process from one core to another. This can affect
performance. To help, SPEC allows the use of a "submit" command where users can specify a utility to use to bind
processes. We have found the utility 'numactl' to be the best choice.
numactl runs processes with a specific NUMA scheduling or memory placement policy. The policy is set for a
command and inherited by all of its children. The numactl flag "--physcpubind" specifies
which core(s) to bind the process. "-l" instructs numactl to keep a process's memory on the
local node while "-m" specifies which node(s) to place a process's memory. For full details on using
numactl, please refer to your Linux documentation, 'man numactl'
Note that some older versions of numactl incorrectly interpret application arguments as its own. For
example, with the command "numactl --physcpubind=0 -l a.out -m a", numactl will interpret
a.out's "-m" option as its own "-m" option. To work around this problem, we put
the command to be run in a shell script and then run the shell script using numactl. For example:
"echo 'a.out -m a' > run.sh ; numactl --physcpubind=0 bash run.sh"
Shell, Environment, and Other Software Settings
numactl --interleave=all runcpu
numactl --interleave=all runcpu executes the SPEC CPU command runcpu so that memory is consumed across NUMA nodes rather than consumed from a single node. This helps prevent local node out-of-memory conditions which can occur when runcpu is executed without interleaving.
For full details on using numactl, please refer to your Linux documentation, 'man numactl'
Transparent Huge Pages (THP)
THP is an abstraction layer that automates most aspects of creating, managing,
and using huge pages. It is designed to hide much of the complexity in using
huge pages from system administrators and developers. Huge pages
increase the memory page size from 4 kilobytes to 2 megabytes. This provides
significant performance advantages on systems with highly contended resources
and large memory workloads. If memory utilization is too high or memory is badly
fragmented which prevents huge pages being allocated, the kernel will assign
smaller 4k pages instead. Most recent Linux OS releases have THP enabled by default.
THP usage is controlled by the sysfs setting /sys/kernel/mm/transparent_hugepage/enabled.
Possible values:
- never: entirely disable THP usage.
- madvise: enable THP usage only inside regions marked MADV_HUGEPAGE using madvise(3).
- always: enable THP usage system-wide. This is the default.
The SPEC CPU benchmark codes themselves never explicitly request huge pages, as the mechanism to do that is OS-specific
and can change over time. Libraries such as amdalloc which are used by the benchmarks may explicitly request huge pages,
and use of such libraries can make the "madvise" setting relevant and useful.
When no huge pages are immediately available and one is requested, how the system handles the request for THP creation is
controlled by the sysfs setting /sys/kernel/mm/transparent_hugepage/defrag.
Possible values:
- never: if no THP are available to satisfy a request, do not attempt to make any.
- defer: an allocation requesting THP when none are available gets normal pages while requesting THP creation in the
background.
- defer+madvise: acts like "always", but only for allocations in regions marked MADV_HUGEPAGE using madvise(3); for all
other regions it's like "defer".
- madvise: acts like "always", but only for allocations in regions marked MADV_HUGEPAGE using madvise(3). This is the
default.
- always: an allocation requesting THP when none are available will stall until some are made.
An application that "always" requests THP often can benefit from waiting for an allocation until those huge pages can be assembled.
For more information see the Linux transparent hugepage documentation.
ulimit -s <n>
Sets the stack size to n kbytes, or unlimited to allow the stack size to grow without limit.
ulimit -l <n>
Sets the maximum size of memory that may be locked into physical memory.
powersave -f (on SuSE)
Makes the powersave daemon set the CPUs to the highest supported frequency.
/etc/init.d/cpuspeed stop (on Red Hat)
Disables the cpu frequency scaling program in order to set the CPUs to the highest supported frequency.
LD_LIBRARY_PATH
An environment variable that indicates the location in the filesystem of bundled libraries to use when running the
benchmark binaries.
sysctl -w vm.dirty_ratio=8
Limits dirty cache to 8% of memory.
sysctl -w vm.swappiness=1
Limits swap usage to minimum necessary.
sysctl -w vm.zone_reclaim_mode=1
Frees local node memory first to avoid remote memory usage.
kernel/numa_balancing
This OS setting controls automatic NUMA balancing on memory mapping and process placement.
NUMA balancing incurs overhead for no benefit on workloads that are already bound to NUMA nodes.
Possible settings:
- 0: disables this feature
- 1: enables the feature (this is the default)
For more information see the numa_balancing entry in the
Linux sysctl documentation.
kernel/randomize_va_space (ASLR)
This setting can be used to select the type of process address space
randomization. Defaults differ based on whether the architecture supports
ASLR, whether the kernel was built with the CONFIG_COMPAT_BRK
option or not, or the kernel boot options used.
Possible settings:
- 0 - Turn the process address space randomization off. This is the default for architectures that do not support
this feature anyway, and kernels that are booted with the "
norandmaps" parameter.
- 1 - Randomize addresses of mmap base, stack, and VDSO pages.
This is the default if the
CONFIG_COMPAT_BRK option is enabled at kernel build time.
- 2 - Additionally enable heap randomization. This is the default if
CONFIG_COMPAT_BRK is
disabled.
Disabling ASLR can make process execution more deterministic and runtimes more consistent.
For more information see the randomize_va_space entry in the
Linux sysctl documentation.
vm/drop_caches
The two commands are equivalent:
echo 3> /proc/sys/vm/drop_caches
and
sysctl -w vm.drop_caches=3
Both must be run as root.
The commands are used to free up the filesystem page cache, dentries, and inodes.
Possible settings:
- 1 - Clear pagecache
- 2 - Clear dentries and inodes
- 3 - Clear pagecache, dentries, and inodes
MALLOC_CONF
The amdalloc library is a variant of jemalloc library. The amdalloc
library has tunable parameters, many of which may be changed at run-time via several mechanisms, one of which
is the MALLOC_CONF environment variable. Other methods, as well as the order in which they're referenced,
are detailed in the jemalloc documentation's TUNING section.
The options that can be tuned at run-time are everything in the jemalloc documentation's
MALLCTL NAMESPACE section that begins with
"opt.".
The options that may be encountered in SPEC CPU 2017 results are detailed here:
retain:true - Causes unused virtual memory to
be retained for later reuse rather than discarding it. This is the default for 64-bit Linux.
thp:never - Attempts to never utilize huge pages
by using MADV_NOHUGEPAGE on all mappings. This option has no effect except when THP is set to
"madvise".
PGHPF_ZMEM
An environment variable used to initialize the allocated memory. Setting PGHPF_ZMEM to "Yes" has the effect of
initializing all allocated memory to zero.
GOMP_CPU_AFFINITY
This environment variable is used to set the thread affinity for threads spawned by OpenMP.
OMP_DYNAMIC
This environment variable is defined as part of the OpenMP standard.
Setting it to "false" prevents the OpenMP runtime from dynamically adjusting the number of threads to use for parallel
execution.
For more information, see chapter 4 ("Environment Variables") in the
OpenMP 4.5 Specification.
OMP_SCHEDULE
This environment variable is defined as part of the OpenMP standard.
Setting it to "static" causes loop iterations to be assigned to threads in round-robin fashion in the order of the thread
number.
For more information, see chapter 4 ("Environment Variables") in the
OpenMP 4.5 Specification.
OMP_STACKSIZE
This environment variable is defined as part of the OpenMP standard and controls the size of the stack for threads created
by OpenMP.
For more information, see chapter 4 ("Environment Variables") in the
OpenMP 4.5 Specification.
OMP_THREAD_LIMIT
This environment variable is defined as part of the OpenMP standard and limits the maximum number of OpenMP threads that
can be created.
For more information, see chapter 4 ("Environment Variables") in the
OpenMP 4.5 Specification.
Operating System Tuning Parameters
- sched_cfs_bandwidth_slice_us
-
This OS setting controls the amount of run-time(bandwidth) transferred to a run queue from the task's control group bandwidth pool. Small values allow the global bandwidth to be shared in a fine-grained manner among tasks, larger values reduce transfer overhead. The default value is 5000 (ns).
- sched_latency_ns
-
This OS setting configures targeted preemption latency for CPU bound tasks. The default value is 24000000 (ns).
- sched_migration_cost_ns
-
Amount of time after the last execution that a task is considered to be "cache hot" in migration decisions. A "hot" task is less likely to be migrated to another CPU, so increasing this variable reduces task migrations. The default value is 500000 (ns).
- sched_min_granularity_ns
-
This OS setting controls the minimal preemption granularity for CPU bound tasks. As the number of runnable tasks increases, CFS(Complete Fair Scheduler), the scheduler of the Linux kernel, decreases the timeslices of tasks. If the number of runnable tasks exceeds sched_latency_ns/sched_min_granularity_ns, the timeslice becomes number_of_running_tasks * sched_min_granularity_ns. The default value is 8000000 (ns).
- sched_wakeup_granularity_ns
-
This OS setting controls the wake-up preemption granularity. Increasing this variable reduces wake-up preemption, reducing disturbance of compute bound tasks. Lowering it improves wake-up latency and throughput for latency critical tasks, particularly when a short duty cycle load component must compete with CPU bound components. The default value is 10000000 (ns).
- numa_balancing
-
This OS setting controls automatic NUMA balancing on memory mapping and process placement.
NUMA balancing incurs overhead for no benefit on workloads that are already bound to NUMA nodes.
Possible settings:
- 0: disables this feature
- 1: enables the feature (this is the default)
For more information see the numa_balancing entry in the Linux sysctl documentation.
- kernel.randomize_va_space (ASLR)
-
This setting can be used to select the type of process address space randomization. Defaults differ based on whether the architecture supports ASLR, whether the kernel was built with the CONFIG_COMPAT_BRK option or not, or the kernel boot options used.
Possible settings:
- 0: Turn process address space randomization off.
- 1: Randomize addresses of mmap base, stack, and VDSO pages.
- 2: Additionally randomize the heap. (This is probably the default.)
Disabling ASLR can make process execution more deterministic and runtimes more consistent.
For more information see the randomize_va_space entry in the Linux sysctl documentation.
- Transparent Hugepages (THP)
-
THP is an abstraction layer that automates most aspects of creating, managing, and using huge pages. It is designed to hide much of the complexity in using huge pages from system administrators and developers. Huge pages increase the memory page size from 4 kilobytes to 2 megabytes. This provides significant performance advantages on systems with highly contended resources and large memory workloads. If memory utilization is too high or memory is badly fragmented which prevents hugepages being allocated, the kernel will assign smaller 4k pages instead. Most recent Linux OS releases have THP enabled by default.
THP usage is controlled by the sysfs setting /sys/kernel/mm/transparent_hugepage/enabled.
Possible values:
- never: entirely disable THP usage.
- madvise: enable THP usage only inside regions marked MADV_HUGEPAGE using madvise(3).
- always: enable THP usage system-wide. This is the default.
THP creation is controlled by the sysfs setting /sys/kernel/mm/transparent_hugepage/defrag.
Possible values:
- never: if no THP are available to satisfy a request, do not attempt to make any.
- defer: an allocation requesting THP when none are available get normal pages while requesting THP creation in the background.
- defer+madvise: acts like "always", but only for allocations in regions marked MADV_HUGEPAGE using madvise(3); for all other regions it's like "defer".
- madvise: acts like "always", but only for allocations in regions marked MADV_HUGEPAGE using madvise(3). This is the default.
- always: an allocation requesting THP when none are available will stall until some are made.
An application that "always" requests THP often can benefit from waiting for an allocation until those huge pages can be assembled.
For more information see the Linux transparent hugepage documentation.
- tuned-adm
-
The tuned-adm tool is a commandline interface for switching between different tuning profiles available to the tuned tuning daemon available in supported Linux distros. The default configuration file is located in /etc/tuned.conf and the supported profiles can be found in /etc/tune-profiles. Some profiles that may be available by default include: balanced, powersave, laptop-ac-powersave, laptop-battery-powersave, spindown-disk, throughput-performance, latency-performance, enterprise-storage, virtual-host. To set a profile, one can issue the command "tuned-adm profile (profile_name)". Here are details about relevant profiles:
- throughput-performance: Server profile for typical throughput tuning. This profile disables tuned and ktune power saving features, enables sysctl settings that may improve disk and network IO throughput performance, switches to the deadline scheduler, and sets the CPU governor to performance.
- latency-performance: Server profile for typical latency tuning. This profile disables tuned and ktune power saving features, enables the deadline IO scheduler, and sets the CPU governor to performance.
- enterprise-storage: Server profile for high disk throughput tuning. This profile disables tuned and ktune power saving features, enables the deadline IO scheduler, enables hugepages and disables disk barriers, increases disk readahead values, and sets the CPU governor to performance.
- balanced: Server profile for balance power saving and performance tuning. This profile enables CPU and disk plugins of tuned and makes the conservative governor is active and also set the CPU energy performance bias to normal. It also enables power saving on audio and graphics card.
- powesave: Server profile for Maximal power saving tuning for whole system. This profile set the CPU governor to ondemand governor and energy performance bias to powersave. It also enable powersave on USB, SATA, audio and grahic card.
- virtual-host: Profile optimized for virtual hosts based on throughput-performance profile. This profile additionally enabled more aggresive writeback for dirty pages.
- dirty_background_ratio
-
Set through "echo 40 > /proc/sys/vm/dirty_background_ratio". This setting can help Linux disk caching and performance by setting the percentage of system memory that can be filled with dirty pages.
- dirty_ratio
-
Set through "echo 8 > /proc/sys/vm/dirty_ratio". This setting is the absolute maximum amount of system memory that can be filled with dirty pages before everything must get committed to disk.
- ksm/sleep_millisecs
-
Set through "echo 200 > /sys/kernel/mm/ksm/sleep_millisecs". This setting controls how many milliseconds the ksmd (KSM daemon) should sleep before the next scan.
- swappiness
-
The swappiness value can range from 1 to 100. A value of 100 will cause the kernel to swap out inactive processes frequently in favor of file system performance, resulting in large disk cache sizes. A value of 1 tells the kernel to only swap processes to disk if absolutely necessary. This can be set through a command like "echo 1 > /proc/sys/vm/swappiness"
- Zone Reclaim Mode
-
Zone reclaim allows the reclaiming of pages from a zone if the number of free pages falls below a watermark even if other zones still have enough pages available. Reclaiming a page can be more beneficial than taking the performance penalties that are associated with allocating a page on a remote zone, especially for NUMA machines. To tell the kernel to free local node memory rather than grabbing free memory from remote nodes, use a command like "echo 1 > /proc/sys/vm/zone_reclaim_mode"
- Free the file system page cache
-
The command "echo 3> /proc/sys/vm/drop_caches" is used to free pagecache, dentries and inodes.
- cpupower
-
The OS 'cpupower' utility is used to change CPU power governors settings. Available settings are:
- performance: Run the CPU at the maximum frequency.
- powersave: Run the CPU at the minimum frequency.
- ondemand: Scales the frequency dynamically according to current load. Jumps to the highest frequency and then possibly back off as the idle time increases.
Firmware / BIOS / Microcode Settings
- Choose Operating Mode: (Default="Maximum Efficiency")
-
Select the operating mode based on your preference. Note, power savings and performance are also highly dependent on hardware and software running on system.
- "Maximum Efficiency" 'Efficiency' balances performance and power consumption.
- "Maximum Performance"'Performance' maxmizes performance minimizes latency with little regard to power consumption.
- "Custom Mode" When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose Custom Mode. Custom Mode will inherit the UEFI settings from the previous preset operating mode. For example, if the previous operating mode was the Maximum Performance operating mode and then Custom Mode was selected, all the settings from the Maximum Performance operating mode will be inherited.
- Determinism Slider:
-
- "Performance (default)" When set to Performance, performance is more predictable (deterministic) and operates at the lowest common denominator among the cores. But aggregate peak performance may be reduced. Aggregate performance may be higher, but predictability is lower.
- "Power" When set to Power, cores can scale frequency independently.
When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- Core Performance Boost:
-
Allows the processor to opportunistically increase a set of CPU cores higher than the CPU’s rated base clock speed, based on the number of active cores, power and thermal headroom in a system.
- "Enabled (default)" When set to Enable, cores can go to turbo frequencies.
- "Disabled" Disables Core Performance Boost so the processor cannot opportunistically increase a set of CPU cores higher than the CPU’s rated base clock speed.
When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- Global C-state Control:
-
C-states are idle power saving states. This setting enables and disables C-states on the server across all cores. When disabled, the CPU cores can only be in C0 (active) or C1 state. C1 state can never be disabled. A CPU core will be in the C1 state if the core is halted by the operating system.
- "Disabled" I/O based C-state generation and Data Fabric (DF) C-states are disabled.
- "Enabled (default)" I/O based C-state generation and DF C-states are enabled.
When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- cTDP:
-
Sets the maximum power consumption for CPU. cTDP is only configurable before OS boot.
- "Auto" Sets cTDP=TDP for the installed CPU SKU.
- "Maximum" Maximum sets the maximum allowed cTDP value for the installed CPU SKU.
- "Manual" Usually, maximum is greater than TDP. If a manual value is entered that is larger than the max value allowed, the value will be internally limited to the maximum allowable value.
Default is Auto. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- cTDP Manual:
-
cTDP is the acronym for Configurable TDP. Some Rome CPU skus support a default TDP and a higher cTDP expressed in Watts.
| Model | Normal TDP | Minimum TDP | Maximum TDP |
| EPYC 9755 | 500 | 450 | 500 |
| EPYC 9655 | 400 | 320 | 400 |
| EPYC 9655P | 400 | 320 | 400 |
| EPYC 9565 | 400 | 320 | 400 |
| EPYC 9575F | 400 | 320 | 400 |
| EPYC 9555 | 360 | 320 | 400 |
| EPYC 9555P | 360 | 320 | 400 |
| EPYC 9535 | 300 | 240 | 300 |
| EPYC 9475F | 400 | 320 | 400 |
| EPYC 9455 | 300 | 240 | 300 |
| EPYC 9455P | 300 | 240 | 300 |
| EPYC 9365 | 300 | 240 | 300 |
| EPYC 9375F | 320 | 320 | 400 |
| EPYC 9355 | 280 | 240 | 300 |
| EPYC 9355P | 280 | 240 | 300 |
| EPYC 9335 | 210 | 200 | 240 |
| EPYC 9275F | 320 | 320 | 400 |
| EPYC 9255 | 200 | 200 | 240 |
| EPYC 9175F | 320 | 320 | 400 |
| EPYC 9135 | 200 | 200 | 240 |
| EPYC 9115 | 125 | 120 | 155 |
| EPYC 9015 | 125 | 120 | 155 |
| EPYC 9965 | 500 | 450 | 500 |
| EPYC 9845 | 390 | 320 | 400 |
| EPYC 9825 | 390 | 320 | 400 |
| EPYC 9745 | 400 | 320 | 400 |
| EPYC 9645 | 320 | 320 | 400 |
| EPYC 9654 | 360 | 320 | 400 |
| EPYC 9654P | 360 | 320 | 400 |
| EPYC 9634 | 290 | 240 | 300 |
| EPYC 9554 | 360 | 320 | 400 |
| EPYC 9554P | 360 | 320 | 400 |
| EPYC 9534 | 280 | 240 | 300 |
| EPYC 9474F | 360 | 320 | 400 |
| EPYC 9454 | 290 | 240 | 300 |
| EPYC 9454P | 290 | 240 | 300 |
| EPYC 9374F | 320 | 320 | 400 |
| EPYC 9354 | 280 | 240 | 300 |
| EPYC 9354P | 280 | 240 | 300 |
| EPYC 9334 | 210 | 200 | 240 |
| EPYC 9274F | 320 | 320 | 400 |
| EPYC 9254 | 200 | 200 | 240 |
| EPYC 9224 | 200 | 200 | 240 |
| EPYC 9174F | 320 | 320 | 400 |
| EPYC 9124 | 200 | 200 | 240 |
| EPYC 9754 | 360 | 320 | 400 |
| EPYC 9734 | 340 | 320 | 400 |
| EPYC 7663P | 240 | 225 | 240 |
| EPYC 7643P | 225 | 225 | 240 |
| EPYC 7303P | 130 | 120 | 150 |
| EPYC 7303 | 130 | 120 | 150 |
| EPYC 7203P | 120 | 120 | 150 |
| EPYC 7203 | 120 | 120 | 150 |
| EPYC 9684X | 400 | 320 | 400 |
Default is 0. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- Memory Speed:
-
Select the desired memory speed. Faster speeds offer better performance but consume more power. Default is Maximum. When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- 4-Link xGMI Max Speed:
-
Sets the xGMI speed. N is the maximum speed and is auto-calculated from the system board capabilities. For system boards that do not support 4 discrete xGMI speed choices. some menu choices besides 'Minimum' will result in the xGMI speed getting set to the minimum value.
- "Minimal(default)"Minimal will result in the xGMI speed getting set to the minimal value, the minimal xGMI max speed is 16GT/s
- "18Gbps" 2 speed bin down from the maximum speed.
- "25Gbps" 1 speed bin down from the maximum speed.
- "32Gbps"Maximum xGMI link speed.
When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- NUMA Nodes per Socket:
-
Specifies the number of desired NUMA nodes per socket.
- "NPS0"NPS0 will attempt to interleave the 2 CPU sockets together.
- "NPS1"NPS1 sets one NUMA node per socket.
- "NPS2"NPS2 sets two NUMA nodes per socket, one per Left/Right Half of the SoC.
- "NPS4"NPS4 sets four NUMA nodes per socket, one per Quadrant.
Default is NPS1.
- Package Power Limit:
-
This Parameter sets the CPU package power limit. The maximum value allowed for PPL is the cTDP limit.
- "Auto(default)"Set to maximum value allowed by installed CPU.
- "Manual"Let the user set a power limit and exposes Package Power Limit value applicable for all poplulated processors in the system. If a manual value entered that is larger than the maximum value allowed(cTDP Maximum), the value will be internally limited to maximum allowable value.
When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- SMT Mode:
-
Can be used to disable symmetric multithreading. To re-enable SMT, a POWER CYCLE is needed after selecting Enable.
- "Enabled (default)"Enables simultaneous multithreading.
- "Disabled"Disables simultaneous multithreading so that only one thread or CPU instruction stream is run on a physical CPU core
- ACPI SRAT L3 Cache as NUMA Domain:
-
When enabled, the last level cache in each CCX in the system will be declared as a separate NUMA domain. It can improve performance for highly NUMA optimized workloads if workloads or components of workloads can be pinned to cores in a CCX and if they can benefit from sharing an L3 cache.
- "Disabled (default)"When disabled, NUMA domains will be identified according to the NUMA Nodes per Socket parameter setting.
- "Enabled"When enabled, each Core Complex (CCX) in the system will become a separate NUMA domain.
- DF P-states:
-
DF P-states is the processor uncore P-states. Setting DF P-states to P0, P1, forces the uncore to operate in a specific P-state frequency.
- "Auto(default)"When Auto is Selected, the CPU DF P-states (uncore P-states) will be dynamically adjusted. That is, their frequency will dynamically change based on the workload.
- "P0"Highest-performing Infinity Fabric P-state.
- "P1"Second-highest-performing Infinity Fabric P-state.
When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- L1 Stream HW Prefetcher:
-
Fetches the next cache line int to the L1 cache when cached lines are reused within a certain time period or accessed sequentially.
- "Enabled(default)"Enable L1 Stream HW Prefetcher.
- "Disabled"Disable L1 Stream HW Prefetcher.
- L1 Stride Prefetcher:
-
Uses memory access history to fetch additional data lines into L1 cache when each access is a constant distance from previous.
- "Enabled(default)"Enable L1 Stride Prefetcher.
- "Disabled"Disable L1 Stride Prefetcher.
- L2 Stream HW Prefetcher:
-
Fetches the next cache line int to the L2 cache when cached lines are reused within a certain time period or accessed sequentially.
- "Enabled(default)"Enable L2 Stream HW Prefetcher.
- "Disabled"Disable L2 Stream HW Prefetcher.
- L1 Region Prefetcher:
-
Enabled/Disabled L1 Region Prefetcher. Fetches additional data lines into L1 cache when the data access for a given instruction tends to be followed by a consistent pattern of subsequent accesses. Some workload may benefit from having it disabled. Default is Enabled
- BoostFmax:
-
This value specifies the maximum boost frequency limit to apply to all cores. If the BoostFmax is set to something higher than the boost algorithms allow, the SoC will not go beyond the allowable frequency that the algorithms support.
- "Auto(default)"Auto set the boost frequency to the fused value for the installed CPU.
- "Manual"A 4 digit number representing the maximum boost frequency in MHz.
- BoostFmax Manual:
-
Select the values to specifies the maximum boost frequency limit to apply to all cores. Default is 0.
- Power Profile Selection:
-
This setting specifies power profile
- "Efficiency Mode(default)"Maximum frequecy per watt by opportunistically reducing frequency/power.
- "High-Performance Mode"Favor core performance more than IO die performance.
- "Maximum IO Performance Mode"Favor IO die performance more than core performance.
- "Balanced Memory Performance Mode"Biases the memory subsystem and Infinity Fabric performance towards efficiency, lowering the frequency of fabric and the width of the xGMI links under a light workload.
- "Balanced Core Performance Mode"Biases towards consistent core performance across varying core utilization levels by preventing active cores from using the power budget of inactive cores.
- "Balanced Core Memory Performance Mode"Combines the Balanced Memory Performance and the Balanced Core Performance Mode.
When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- P-State:
-
This setting enables or disables CPU's P-State.
- "Enabled(default)"Core frequency can move between SKU-specific predefined P-States based on its utilization to balance performance and power usage.
- "Disabled"Sets the core frequency to the highest-available frequency within P0.
When a preset mode is selected, the low-level settings are not changeable and will be grayed out. If user would like to change the settings, please choose [Custom Mode] in "Operating Mode" located under "System Setting" submenu.
- xGMI Maximum Link Width:
-
Sets the xGMI maximum allowable link width. The actual xGMI link width can vary between the minimum and maximum width selected.
- "Auto(default)"use the default xGMI link width controller settings, sets the maximum width based on the system capabilities, the max xGMI link width default is set to x16.
- "0"Specify a custom xGMI link with controller setting, set max xGMI link width to x8.
- "1"Specify a custom xGMI link with controller setting, set max xGMI link width to x16.
- DRAM Scrub Time:
-
Memory reliability parameter that sets the period of time between successive DRAM scrub events. Performance may be reduced with more frequent DRAM scrub events.
Possible values:
- "Disable"
- "1 hour"
- "4 hour"
- "8 hour"
- "16 hour"
- "24 hour (default)"
- "48 hour"
- Memory Interleave:
-
This setting allows interleaved memory accesses across multiple memory channels in each socket, providing higher memory bandwidth.
- "Enabled(default)"Interleaving is automatically enabled if memory DIMM configuration supports it.
- "Disabled"No interleaving.
- GMI Folding:
-
GMI stands for Global Memory Interconnect. It's an AMD Infinity fabric interface that offers data communication between the CPU die and the I/O die. GMI Folding reduces the number of active communication lanes on the inifinity fabric in specific scenarios, effectively "folding" the lanes.
- "Enabled(default)"Enable GMI Folding feature to save link power.
- "Disabled"Disable GMI Folding feature to decrease memory latency.
- Periodic Directory Rinse (PDR) Tuning:
-
Controls PDR setting that may impact performance by workload and/or processor.
- "Memory-Sensitive"May accelerate high b/w scenarios.
- "Cache-Bound"May allelerate cache-bound secenarios.
- "Neutral"Fallback option for unknown or mixed scenarios.
- "Adaptive"Adjusts based on Memory/Cache Activity.
- "Auto"Will use silicon reset value.
Default is Auto.
- Fan Speed Boost:
-
This setting allows additional cooling to the server based on ambient temperature. It can increase the fan over normal speed by controlled thermal algorithm. There will be no change if fan already running at full speed.
- "Normal"No fan speed boost.
- "Low"Slight boost in fan speed.
- "Medium"Moderate boost in fan speed.
- "High"Large boost in fan speed.
Default is Normal.
- C State Support:
-
Select whether to enable or disable the CPU power management state to minimize idle power consumption of the processor.
- "Enabled"The operating system initiates the C-state transitions.
- "Disabled"Only C0 and C1 are used by the OS. C1 gets enabled automatically when an OS autohalts.
Default is Enabled.
- AMD Secure Virtual Machine:
-
Select whether to enabled or disabled AMD Virtuailiztion technology. When set to Enabled, the BIOS will enable processor Virtualization features and provide the virtualization support to the Operating System (OS) through the DMAR table.
Default is Enabled.
- CPB Mode:
-
Allows the processor to dynamically control and adjust its operating frequency to increase performance when needed and maintain lower power and thermal characteristics during normal operation.
- "Enabled"When set to Enable, cores can go to turbo frequencies.
- "Disabled"Disables Core Performance Boost so the processor cannot opportunistically increase a set of CPU cores higher than the CPU’s rated base clock speed.
Default is Enabled.
For questions about the meanings of these flags, please contact the tester.
For other inquiries, please contact info@spec.org
Copyright 2026 Standard Performance Evaluation Corporation
Tested with SPEC CPU®2026 v0.902.0.
Report generated on 2026-05-11 16:38:02 by SPEC CPU®2026 flags formatter (5b352a85).