SPEC CPU®2017 Floating Point Rate Result

Copyright 2017-2020 Standard Performance Evaluation Corporation

Hewlett Packard Enterprise (Test Sponsor: HPE)

ProLiant DL360 Gen9
(2.40 GHz, Intel Xeon E5-2699A v4)

SPECrate®2017_fp_base = 14900

SPECrate®2017_fp_peak = 14900

CPU2017 License: 3 Test Date: Dec-2016
Test Sponsor: HPE Hardware Availability: Oct-2016
Tested by: HPE Software Availability: Sep-2016

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon E5-2699A v4
  Max MHz: 3600
  Nominal: 2400
Enabled: 44 cores, 2 chips, 2 threads/core
Orderable: 1,2 chips
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 256 KB I+D on chip per core
  L3: 55 MB I+D on chip per chip
  Other: None
Memory: 512 GB (16 x 32 GB 2Rx4 PC4-2400T-R)
Storage: 1 x 400 GB SAS SSD, RAID 0
Other: None
Software
OS: SUSE Linux Enterprise Server 12 (x86_64) SP1
Kernel 3.12.49-11-default
Compiler: C/C++: Version 17.0.0.098 of Intel C/C++
Compiler for Linux;
Fortran: Version 17.0.0.098 of Intel Fortran
Compiler for Linux
Parallel: No
Firmware: P89 v2.30 9/12/16
File System: btrfs
System State: Run level 5 (multi-user, w/GUI)
Base Pointers: 32/64-bit
Peak Pointers: 32/64-bit
Other: Microquill SmartHeap V10.2
Power Management: --

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate®2017_fp_base 14900
SPECrate®2017_fp_peak 14900
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
503.bwaves_r 88 2916 3030 2914 3030 2915 3030 88 2937 3010 2938 3000 2937 3000
507.cactuBSSN_r 88 982 1130 981 1140 983 1130 88 995 1120 996 1120 992 1120
508.namd_r 88 533 1570 536 1560 532 1570 88 532 1570 534 1570 538 1560
510.parest_r 88 3103 74.2 3094 74.4 3109 74.0 88 3115 73.9 3111 74.0 3111 74.0
511.povray_r 88 834 2460 840 2450 841 2440 88 685 3000 687 2990 686 3000
519.lbm_r 88 1249 74.3 1249 74.3 1249 74.3 88 1250 74.2 1252 74.1 1250 74.2
521.wrf_r 88 1461 1350 1458 1350 1460 1350 88 1462 1350 1461 1350 1462 1350
526.blender_r 88 606 2210 606 2210 606 2210 88 615 2180 615 2180 616 2170
527.cam4_r 88 839 1830 840 1830 845 1820 88 840 1830 843 1830 839 1830
538.imagick_r 88 924 2370 926 2360 924 2370 88 1007 2170 1006 2180 1009 2170
544.nab_r 88 493 3000 491 3020 494 3000 88 485 3060 483 3060 481 3080
549.fotonik3d_r 88 3500 98.0 3492 98.2 3503 97.9 88 3627 94.6 3632 94.4 3627 94.6
554.roms_r 88 2267 61.7 2265 61.7 2259 61.9 88 2296 60.9 2295 60.9 2292 61.0

Submit Notes

The config file option 'submit' was used.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"
 Transparent Huge Pages enabled by default
 Filesystem page cache cleared with:
  echo 1 >       /proc/sys/vm/drop_caches
 runcpu command invoked through numactl i.e.:
  numactl --interleave=all runcpu <etc>

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/cpu2017/lib/ia32:/cpu2017/lib/intel64:/cpu2017/sh10.2"

 Binaries compiled on a system with 1x Intel Core i7-4790K CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.2

Platform Notes

 BIOS Configuration:
   Power Profile set to Custom
   Power Regulator set to Static High Performance Mode
   Minimum Processor Idle Power Core C-State set to C6 State
   Minimum Processor Idle Power Package C-State set to No Package State
   Collaborative Power Control set to Disabled
   QPI Snoop Configuration set to Cluster On Die
   Thermal Configuration set to Maximum Cooling
   Processor Power and Utilization Monitoring set to Disabled
   Memory Double Refresh Rate set to 1x Refresh
   Energy Performance Bias set to Maximum Performance
 Sysinfo program /cpu2017/Docs/sysinfo
 Rev: r5007 of 2016-11-15 fc8dc82f217779bedfed4d694d580ba9
 running on linux-mzur Wed Dec  7 10:54:07 2016

 This section contains SUT (System Under Test) info as seen by some common
 utilities.
 For more information on this section, see
 http://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) CPU E5-2699A v4 @ 2.40GHz
       2 "physical id"s (chips)
       88 "processors"
    cores, siblings (Caution: counting these is hw and system dependent.  The
    following excerpts from /proc/cpuinfo might not be reliable.  Use with
    caution.)
       cpu cores : 22
       siblings  : 44
       physical 0: cores 0 1 2 3 4 5 8 9 10 11 12 16 17 18 19 20 21 24 25 26 27
       28
       physical 1: cores 0 1 2 3 4 5 8 9 10 11 12 16 17 18 19 20 21 24 25 26 27
       28
    cache size : 28160 KB

 The view from numactl --hardware follows.  WARNING: a numactl 'node' might or
 might not correspond to a physical chip.
   available: 4 nodes (0-3)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 44 45 46 47 48 49 50 51 52 53 54
   node 0 size: 128920 MB
   node 0 free: 114735 MB
   node 1 cpus: 11 12 13 14 15 16 17 18 19 20 21 55 56 57 58 59 60 61 62 63 64 65
   node 1 size: 129277 MB
   node 1 free: 119637 MB
   node 2 cpus: 22 23 24 25 26 27 28 29 30 31 32 66 67 68 69 70 71 72 73 74 75 76
   node 2 size: 129277 MB
   node 2 free: 119994 MB
   node 3 cpus: 33 34 35 36 37 38 39 40 41 42 43 77 78 79 80 81 82 83 84 85 86 87
   node 3 size: 129275 MB
   node 3 free: 120071 MB
   node distances:
   node   0   1   2   3
     0:  10  21  31  31
     1:  21  10  31  31
     2:  31  31  10  21
     3:  31  31  21  10

 From /proc/meminfo
    MemTotal:       529153016 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    SUSE Linux Enterprise Server 12 SP1

 From /etc/*release* /etc/*version*
    SuSE-release:
       SUSE Linux Enterprise Server 12 (x86_64)
       VERSION = 12
       PATCHLEVEL = 1
       # This file is deprecated and will be removed in a future service pack or
       release.
       # Please check /etc/os-release for details about this release.
    os-release:
       NAME="SLES"
       VERSION="12-SP1"
       VERSION_ID="12.1"
       PRETTY_NAME="SUSE Linux Enterprise Server 12 SP1"
       ID="sles"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:12:sp1"

 uname -a:
    Linux linux-mzur 3.12.49-11-default #1 SMP Wed Nov 11 20:52:43 UTC 2015
    (8d714a0) x86_64 x86_64 x86_64 GNU/Linux

 run-level 5 Dec 6 20:38

 SPEC is set to: /cpu2017
    Filesystem     Type   Size  Used Avail Use% Mounted on
    /dev/sdb3      btrfs  369G  271G   97G  74% /

 Additional information from dmidecode follows.  WARNING: Use caution when you
 interpret this section. The 'dmidecode' program reads system data which is
 "intended to allow hardware to be accurately determined", but the intent may not
 be met, as there are frequent changes to hardware, firmware, and the "DMTF
 SMBIOS" standard.
   BIOS HP P89 09/12/2016
   Memory:
    8x UNKNOWN NOT AVAILABLE
    16x UNKNOWN NOT AVAILABLE 32 GB 2 rank 2400 MHz

 (End of data from sysinfo program)
   Regarding the sysinfo display about the memory installed, the correct amount of
   memory is 512 GB and the dmidecode description should have one line reading as:
   16x UNKNOWN NOT AVAILABLE 32 GB 2 rank 2400 MHz

Compiler Version Notes

==============================================================================
C               | 519.lbm_r(base, peak) 538.imagick_r(base, peak)
                | 544.nab_r(base, peak)
------------------------------------------------------------------------------
icc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++             | 508.namd_r(base, peak) 510.parest_r(base, peak)
------------------------------------------------------------------------------
icpc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base pass 0, base pass 0, peak pass 1, peak
                | pass 1, peak pass 2, peak pass 2) 526.blender_r(base pass
                | 0, base pass 0, peak pass 1, peak pass 1, peak pass 2, peak
                | pass 2)
------------------------------------------------------------------------------
icc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 507.cactuBSSN_r(base pass 0, peak pass 1) 511.povray_r(base
                | pass 0, base pass 0, peak pass 1, peak pass 1, peak pass 2,
                | peak pass 2) 526.blender_r(base pass 0, base pass 0, peak
                | pass 1, peak pass 1, peak pass 2, peak pass 2)
------------------------------------------------------------------------------
icpc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base pass 0, base pass 0, peak pass 1, peak
                | pass 1, peak pass 2, peak pass 2) 526.blender_r(base pass
                | 0, base pass 0, peak pass 1, peak pass 1, peak pass 2, peak
                | pass 2)
------------------------------------------------------------------------------
icc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 507.cactuBSSN_r(base pass 0, peak pass 1) 511.povray_r(base
                | pass 0, base pass 0, peak pass 1, peak pass 1, peak pass 2,
                | peak pass 2) 526.blender_r(base pass 0, base pass 0, peak
                | pass 1, peak pass 1, peak pass 2, peak pass 2)
------------------------------------------------------------------------------
icpc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base pass 0, peak pass 1, peak pass 2)
------------------------------------------------------------------------------
icc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(peak pass 2)
------------------------------------------------------------------------------
icpc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base pass 0, peak pass 1, peak pass 2)
------------------------------------------------------------------------------
ifort (IFORT) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base pass 0, peak pass 1, peak pass 2)
------------------------------------------------------------------------------
icc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(peak pass 2)
------------------------------------------------------------------------------
icpc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base pass 0, peak pass 1, peak pass 2)
------------------------------------------------------------------------------
ifort (IFORT) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base pass 0, peak pass 1, peak pass 2)
------------------------------------------------------------------------------
icc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(peak pass 2)
------------------------------------------------------------------------------
icpc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base pass 0, peak pass 1, peak pass 2)
------------------------------------------------------------------------------
ifort (IFORT) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak)
                | 554.roms_r(base, peak)
------------------------------------------------------------------------------
ifort (IFORT) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base pass 0, base pass 0, peak pass 1, peak pass
                | 1, peak pass 2, peak pass 2) 527.cam4_r(base pass 0, base
                | pass 0, peak pass 1, peak pass 1, peak pass 2, peak pass 2)
------------------------------------------------------------------------------
icc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base pass 0, base pass 0, peak pass 1, peak pass
                | 1, peak pass 2, peak pass 2) 527.cam4_r(base pass 0, base
                | pass 0, peak pass 1, peak pass 1, peak pass 2, peak pass 2)
------------------------------------------------------------------------------
ifort (IFORT) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base pass 0, base pass 0, peak pass 1, peak pass
                | 1, peak pass 2, peak pass 2) 527.cam4_r(base pass 0, base
                | pass 0, peak pass 1, peak pass 1, peak pass 2, peak pass 2)
------------------------------------------------------------------------------
icc (ICC) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base pass 0, base pass 0, peak pass 1, peak pass
                | 1, peak pass 2, peak pass 2) 527.cam4_r(base pass 0, base
                | pass 0, peak pass 1, peak pass 1, peak pass 2, peak pass 2)
------------------------------------------------------------------------------
ifort (IFORT) 17.0.0 20160721
Copyright (C) 1985-2016 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using both C and C++:

 icpc -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Base Portability Flags

503.bwaves_r:  -DSPEC_LP64 
507.cactuBSSN_r:  -DSPEC_LP64 
508.namd_r:  -DSPEC_LP64 
510.parest_r:  -DSPEC_LP64 
511.povray_r:  -DSPEC_LP64 
519.lbm_r:  -DSPEC_LP64 
521.wrf_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
526.blender_r:  -DSPEC_LP64   -DSPEC_LINUX   -funsigned-char 
527.cam4_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
538.imagick_r:  -DSPEC_LP64 
544.nab_r:  -DSPEC_LP64 
549.fotonik3d_r:  -DSPEC_LP64 
554.roms_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3 

C++ benchmarks:

 -Wl,-z,muldefs   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3   -L/sh10.2 -lsmartheap64 

Fortran benchmarks:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs 

Benchmarks using both Fortran and C:

 -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs 

Benchmarks using both C and C++:

 -Wl,-z,muldefs   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3   -L/sh10.2 -lsmartheap64 

Benchmarks using Fortran, C, and C++:

 -Wl,-z,muldefs   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs   -L/sh10.2 -lsmartheap64 

Peak Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using both C and C++:

 icpc -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

 -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3 

C++ benchmarks:

 -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3   -L/sh10.2 -lsmartheap64 

Fortran benchmarks:

 -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs 

Benchmarks using both Fortran and C:

 -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs 

Benchmarks using both C and C++:

 -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3   -L/sh10.2 -lsmartheap64 

Benchmarks using Fortran, C, and C++:

 -Wl,-z,muldefs   -prof-gen(pass 1)   -prof-use(pass 2)   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -auto-p32   -qopt-prefetch   -qopt-mem-layout-trans=3   -nostandard-realloc-lhs   -L/sh10.2 -lsmartheap64 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic17.0-official-linux64-revD.html,
http://www.spec.org/cpu2017/flags/HP-Platform-Flags-Intel-V1.2-HSW-revE.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic17.0-official-linux64-revD.xml,
http://www.spec.org/cpu2017/flags/HP-Platform-Flags-Intel-V1.2-HSW-revE.xml.